L9942 データシートの表示（PDF） - STMicroelectronics
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L9942 Datasheet PDF : 40 Pages
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SPI - control and status registers
L9942
5.6
Register 6
Table 19. Register 6
CLR
ST
(PWM)
Filter
Freq.
ST
REF
ERR
Open load
Current profile 8
Bit
12 11 10
9
8
7
6
5
4
3
2
1
0
Access r w r w r w r w
r
r
r
r
rw rw rw rw rw
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
Name CLR6 SST
FT
PWM
Freq.
ST
RREF Phase Phase
Error B
A
I4
I3
I2
I1
I0
The meaning of the different bits is as follows:
I4 I3 I2 I1 I0
Phase B Phase A
RREF Error
ST
PWM Freq.
FT
SST
CLR6
These bits are loaded in register1 DAC Phase A or B if needed See also parameter Table 12
These bits indicate open load at bridges
This bit indicates if reference current is OK (150 µA <IREF < 250 µA), then is RERR=0.
This bit indicates stall detection.
This bit sets frequency of PWM cycle. FRE=1 frequency 20 kHz, FRE=0 frequency 30 kHz
This bit sets filter time in glitch filter. FT=0 TF =1.5 µs, FT=1 TF = 2.5 µs
This bit specifies output PWM to reflect same logical level like bit ST.
This bit resets all read only bits to 0 in register 6.
5.7
Register 7
Table 20. Register 7
CLR Temperature VS monitor
Overcurrent
Bit
12 11 10
9
8
7
6
5
4
3
2
1
0
Access r w
Reset 0
Name CLR7
r
0
TSD
r
r
0
0
TW OV(W)
r
r
r
r
r
r
r
r
r
0
0
0
0
0
0
0
0
0
UV HSB2 HSB1 LSB2 LSB1 HSA2 HSA1 LSA2 LSA1
The meaning of the different bits is as follows:
bit7 ... bit0
1
OV(W) UV
01
10
TSD TW
01
10
CLR7
These bits indicate overcurrent in each low side or highside power transistor.
overcurrent failure I > 2 A
These bits indicates failure at VS (See also parameter Table 9)
Voltage at pin VS is too low.
Voltage at pin VS is too high.
These bits indicates temperature failure (See also parameter Table 7)
Only for information set at temperature warning threshold.
In case of thermal shutdown all bridges are switched off. It has to reset by bit CLR7.
This bit resets all bits to 0 in register 7.
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Doc ID 11778 Rev 7
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