IDT7005L20G データシートの表示（PDF） - Integrated Device Technology
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IDT7005L20G Datasheet PDF : 20 Pages
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IDT7005S/L
HIGH-SPEED 8K x 8 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
WAVEFORM OF BUSY ARBITRATION CONTROLLED BY CE TIMING (M/S = VIH)(1)
ADDR"A"
and "B"
ADDRESSES MATCH
CE"A"
tAPS (2)
CE"B"
tBAC
BUSY"B"
tBDC
2738 drw 15
WAVEFORM OF BUSY ARBITRATION CYCLE CONTROLLED BY ADDRESS MATCH TIMING
(M/S = VIH)(1)
ADDR"A"
ADDR"B"
BUSY"B"
tAPS (2)
ADDRESS "N"
MATCHING ADDRESS "N"
tBAA
tBDA
2738 drw 16
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from port “A”.
2. If tAPS is not satisfied, the busy signal will be asserted on one side or another but there is no guarantee on which side busy will be asserted.
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)
Symbol
Parameter
INTERRUPT TIMING
tAS
Address Set-up Time
tWR
Write Recovery Time
tINS
Interrupt Set Time
tINR
Interrupt Reset Time
IDT7005X15
Com'l. Only
Min. Max.
IDT7005X17
Com'l. Only
Min. Max.
IDT7005X20
Min. Max.
IDT7005X25
Min. Max. Unit
0
—
0
—
0
—
0
— ns
0
—
0
—
0
—
0
— ns
0
15
—
15
—
20
—
20 ns
0
15
—
15
—
20
—
20 ns
Symbol
Parameter
INTERRUPT TIMING
tAS
Address Set-up Time
tWR
Write Recovery Time
tINS
Interrupt Set Time
tINR
Interrupt Reset Time
NOTE:
1. "X" in part numbers indicates power rating (S or L).
IDT7005X35
Min. Max.
IDT7005X55
Min. Max.
IDT7005X70
Mil. Only
Min. Max. Unit
0
—
0
—
0
— ns
0
—
0
—
0
— ns
—
25
—
40
—
50 ns
—
25
—
40
—
50 ns
2738 tbl 16
6.06
14
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