ICS932S208YFLNT データシートの表示（PDF） - Integrated Device Technology
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ICS932S208YFLNT
Integrated Device Technology
ICS932S208YFLNT Datasheet PDF : 21 Pages
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ICS932S208
Programmable Timing Control HubTM for Next Gen P4TM Processor
I2C Table: Read-Back Register
Byte 0
Bit 7
Bit 6
Pin #
-
-
Bit 5
-
Bit 4
-
Bit 3
-
Bit 2
-
Bit 1
-
Name
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
FSB
Bit 0
-
FSA
Control Function
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
Freq Select 1 Read
Back
Freq Select 0 Read
Back
Type
-
-
-
-
-
-
R
R
0
1
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
READBACK of CPU(3:0)
Frequency
PWD
X
X
X
X
X
X
X
X
I2C Table: Spreading and Device Behavior Control Register
Byte 1
Pin #
Name
Control Function
Bit 7
38, 37
SRC/SRC#
SRC Free-Running
Control
Bit 6
Bit 5
38, 37
-
SRC
RESERVED
Output Control
RESERVED
Bit 4
-
Bit 3
-
RESERVED
RESERVED
RESERVED
RESERVED
Bit 2
47, 46
CPUT2/CPUC2
Output Control
Bit 1
Bit 0
44, 43
41, 40
CPUT1/CPUC1
CPUT0/CPUC0
Output Control
Output Enable
Type
RW
RW
-
-
-
RW
RW
RW
0
1
FREE-RUN STOPPABLE
Disable
Enable
RESERVED
RESERVED
RESERVED
Disable
Enable
Disable
Enable
Disable
Enable
PWD
0
1
X
X
X
1
1
1
I2C Table: Output Control Register
Byte 2
Pin #
Name
Bit 7
38, 37
SRC_PD#
Drive Mode
Bit 6
38, 37
SRC_Stop#
Drive Mode
Bit 5
47, 46
CPUT2_PD# Drive
Mode
Bit 4
44, 43
CPUT1_PD# Drive
Mode
Bit 3
41, 40
CPUT0_PD# Drive
Mode
Bit 2
-
RESERVED
Bit 1
-
RESERVED
Bit 0
-
RESERVED
Control Function
0: Driven in PD#
0: Driven in
PCI_Stop#
0:driven in PD#
1: Tri-stated
RESERVED
RESERVED
RESERVED
Type
RW
RW
RW
RW
RW
-
-
-
0
1
Driven
Hi-Z
Driven
Hi-Z
Driven
Hi-Z
Driven
Hi-Z
Driven
Hi-Z
RESERVED
RESERVED
RESERVED
PWD
0
0
0
0
0
X
X
X
IDTTM Programmable Timing Control HubTM for Next Gen P4TM Processor
12
0743G—01/26/10
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