307G-03LF データシートの表示（PDF） - Integrated Circuit Systems

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307G-03LF

SERIALLY PROGRAMMABLE CLOCK SOURCE

Integrated Circuit Systems 

ICS307-03

SERIALLY PROGRAMMABLE CLOCK SOURCE

Table 5. Output Divider for Output 1

Divide

Bits

Value 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 Rule

2

X X X X X X X X X X X0000

3

X X X X X X X X X X X0001

4

X X X X X X X X X X X1000

5

X X X X X X X X X X XX0 1 0

6

X X X X X X X X X X X1001

7

X X X X X X X X X X 00011

8

X X X X X X X 1 1 1 0 1 1 0 0 apply Rule from Divide Values 14-37

9

X X X X X X X X X X 10011

10

X X X X X X X 1 1 0 1 1 1 0 0 apply Rule from Divide Values 14-37

11

X X X X X X X X X X 01011

12

X X X X X X X 1 1 0 0 1 1 0 0 apply Rule from Divide Values 14-37

13

X X X X X X X X X X 11011

14

X X X X X X X 1 0 1 1 1 1 0 0 subtract 6 from the desired

15

X X X X X X X 1 0 1 1 0 1 0 0 divide value, convert to binary,

invert, and apply to bits 102..98

set bits [97..95] = 100

36

X X X X X X X 0 0 0 01100

37

X X X X X X X 0 0 0 00100

38

0 0 0 0 1 0 0 0 0 0 0 1 1 0 1 output divide =

39

0 0 0 0 1 0 0 0 0 0 0 1 1 0 1 ((([109..101]+3)*2)+[98])*2^[100

(increments of 1)

set bits [95..97] = 101 †

1029 1 1 1 1 1 1 1 1 1 0 0 0 1 0 1 († this Rule applies to Divide

1030 0 1 1 1 1 1 1 1 0 0 1 0 1 0 1 Values 38-8232)

1032 0 1 1 1 1 1 1 1 1 0 1 1 1 0 1

(increments of 2)

2056 1 1 1 1 1 1 1 1 1 0 1 1 1 0 1

2058 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1

2060 0 1 1 1 1 1 1 1 0 1 0 0 1 0 1

2064 0 1 1 1 1 1 1 1 1 1 0 1 1 0 1

(increments of 4)

4112 1 1 1 1 1 1 1 1 1 1 0 1 1 0 1

4116 1 1 1 1 1 1 1 1 1 1 0 0 1 0 1

4120 0 1 1 1 1 1 1 1 0 1 1 0 1 0 1

4128 0 1 1 1 1 1 1 1 1 1 1 1 1 0 1

(increments of 8)

8224 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1

8232 1 1 1 1 1 1 1 1 1 1 1 0 1 0 1

MDS 307-03 C

5

Revision 101705

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