HYB18T512802BF-3.7 データシートの表示（PDF） - Infineon Technologies

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HYB18T512802BF-3.7

DDR2 Registered Memory Modules

Infineon Technologies 

HYS72T[256/128/64][0/2][0/2]0[G/H]R-[5/3.7]-A

Registered DDR2 SDRAM Modules

5.0 Electrical Characteristics & AC Timings

5.1 AC Timing Parameter by Speed Grade (Component level data, for reference only)

Symbol

Parameter

tAC DQ output access time from CK / CK

tDQSCK DQS output access time from CK / CK

tCH CK, CK high-level width

tCL CK, CK low-level width

tHP Clock Half Period

tCK Clock cycle time

CL = 3

CL = 4 & 5

tIS Address and control input setup time

tIH Address and control input hold time

tDS DQ and DM input setup time

tDH DQ and DM input hold time

tIPW Control and Addr. input pulse width (each input)

tDIPW DQ and DM input pulse width (each input)

tHZ Data-out high-impedance time from CK / CK

tLZ(DQ) DQ low-impedance from CK / CK

tLZ(DQS) DQS low-impedance from CK / CK

tDQSQ

DQS-DQ skew

(for DQS & associated DQ signals)

tQHS

tQH

Data hold skew factor

Data Output hold time from DQS

tDQSS Write command to 1st DQS latching transition

tDQSL,H DQS input low (high) pulse width (write cycle)

tDSS

DQS falling edge to CLK setup time

(write cycle)

tDSH

DQS falling edge hold time from CLK

(write cycle)

tMRD

tWPRE

tWPST

tRPRE

tRPST

tRAS

tRC

tRFC

Mode register set command cycle time

Write preamble

Write postamble

Read preamble

Read postamble

Active to Precharge command

Active to Active/Auto-refresh command period

Auto-refresh to Active/Auto-refresh command period

-5

DDR2-400

Min

− 600

Max

+ 600

− 500

+ 500

0.45

0.55

0.45

0.55

min. (tCL, tCH)

5000

8000

5000

8000

600

-

600

-

400

-

400

-

0.6

-

0.35

-

-

tACmax

2*tACmin tACmax

tACmin tACmax

-

350

-

tHP-tQHS

WL

-0.25

0.35

450

-

WL

+0.25

-

0.2

-

0.2

-

2

-

0.25

-

0.40

0.60

0.9

1.1

0.40

0.60

45

70000

60

-

105

-

-3.7

DDR2-533

Unit

Min

-500

Max

+500

ps

−450

+450

ps

0.45

0.55

tCK

0.45

0.55

tCK

min. (tCL, tCH)

5000

8000

ps

3750

8000

ps

600

-

ps

600

-

ps

350

-

ps

350

-

ps

0.6

0.35

-

-

tCK

-

tCK

tACmax ps

2*tACmin tACmax ps

tACmin tACmax ps

-

300

ps

-

tHP-tQHS

WL

-0.25

0.35

0.2

400

ps

-

WL

+0.25

tCK

-

tCK

-

tCK

0.2

2

0.25

0.40

0.9

0.40

45

60

105

-

tCK

-

tCK

-

tCK

0.60

tCK

1.1

tCK

0.60

tCK

70000 ns

-

ns

-

ns

Data Sheet

Preliminary

17

Rev. 0.85, 2004-04

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