HEF4059BD データシートの表示（PDF） - Philips Electronics
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HEF4059BD Datasheet PDF : 6 Pages
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Philips Semiconductors
Programmable divide-by-n counter
Product specification
HEF4059B
LSI
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns
VDD
V
Dynamic power
5
dissipation per
10
package (P); n = 3
15
5
n = 1000
10
15
TYPICAL FORMULA FOR P (µW)
1 100 fi + ∑(foCL) × VDD2
5 500 fi + ∑(foCL) × VDD2
15 000 fi + ∑(foCL) × VDD2
500 fi + ∑(foCL) × VDD2
3 500 fi + ∑(foCL) × VDD2
9 000 fi + ∑(foCL) × VDD2
where
fi = input freq. (MHz)
fo = output freq. (MHz)
CL = load capacitance (pF)
∑(foCL) = sum of outputs
VDD = supply voltage (V)
AC CHARACTERISTICS
VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns
VDD
V
SYMBOL MIN.
TYP.
Propagation delays
CP → O
HIGH to LOW
LOW to HIGH
Output transition times
HIGH to LOW
LOW to HIGH
Maximum clock
pulse frequency
5
10 tPHL
15
5
10 tPLH
15
5
10 tTHL
15
5
10 tTLH
15
5
10 fmax
15
90
45
35
100
50
40
30
15
10
45
25
16
3,5
7
7,5
15
10,0
20
MAX.
180
90
70
200
100
80
60
30
20
90
50
32
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
TYPICAL EXTRAPOLATION
FORMULA
78 ns + (0,25 ns/pF) CL
40 ns + (0,10 ns/pF) CL
32 ns + (0,07 ns/pF) CL
76 ns + (0,48 ns/pF) CL
40 ns + (0,20 ns/pF) CL
33 ns + (0,15 ns/pF) CL
10 ns + (0,40 ns/pF) CL
6 ns + (0,18 ns/pF) CL
4 ns + (0,13 ns/pF) CL
10 ns + (0,70 ns/pF) CL
9 ns + (0,33 ns/pF) CL
5 ns + (0,23 ns/pF) CL
January 1995
6
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