ADG721(Rev0) データシートの表示（PDF） - Analog Devices

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ADG721
(Rev.:Rev0)

CMOS Low Voltage 4 V Dual SPST Switches

Analog Devices 

ADG721/ADG722/ADG723

–6

VDD = +5V

–7

–8

–9

–10

–11

–12

100

1k

10k

100k

1M

10M 100M

FREQUENCY – Hz

Figure 7. On Response vs. Frequency

Test Circuits

IDS

V1

S

D

VS

RON = V1/IDS

Test Circuit 1. On Resistance

IS (OFF)

S

A

VS

ID (OFF)

D

A

VD

Test Circuit 2. Off Leakage

S

VS

ID (ON)

D

A

VD

Test Circuit 3. On Leakage

VDD

0.1␮F

VIN ADG721

50%

50%

VDD

S

VS

IN

D

VOUT

VIN ADG722

50%

50%

RL

CL

300⍀ 35pF

VOUT

90%

90%

GND

tON

tOFF

Test Circuit 4. Switching Times

VDD

0.1␮F

VS1

S1

VS2

S2

IN1, IN2

VIN

VDD

GND

D1

D2

RL2

300⍀

VOUT2

CL2

35pF

RL1

300⍀

VOUT1

CL1

35pF

VIN

0V

VOUT1

0V

50%

90%

VOUT2

90%

0V

tD

50%

90%

90%

tD

Test Circuit 5. Break-Before-Make Time Delay, tD (ADG723 Only)

–6–

REV. 0

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