AD7322BRU データシートの表示（PDF） - Atmel Corporation
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AD7322BRU Datasheet PDF : 18 Pages
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Preliminary Technical Data
AD7322
3,2
Seq1/Seq2
14,12,11,1 ZERO
Reference used for each channel will be the value written to the Ref bit during the last write to the Control
Register.
The Sequence 1 and Sequence 2 bits are used to control the operation of the Sequencer. See Table 8
A zero must be written to this bit to ensure correct operation of the AD7322.
Table 9. Analog Input Configuration Selection
Channel Address Bit
ADD0
0
1
Mode1 =1, Mode0 = 1
1 Pseudo Differential I/p
Vin+
Vin-
Vin0
Vin1
Vin0
Vin1
Mode1 = 1, Mode0 =0
1Fully Differential i/p
Vin+ Vin-
Vin0 Vin1
Vin0 Vin1
Mode1 = 0, Mode0 =1
Not Allowed
Mode1 =0, Mode0 =0
Two-Single Ended i/ps
Vin+
Vin-
Vin0
AGND
Vin1
AGND
Table 10. Power Mode Selection
PM1 PM0 Description
Full Shutdown Mode, In this mode all internal circuitry on the
1
1 AD7322 is powered down. Information in the Control register is
retained when the AD7322 is in Full Shutdown Mode.
Auto Shutdown Mode, The AD7322 will enter Full Shut down
1
0
at the end of each conversion when the control register is
updated. All internal circuitry is powered down in Full
Shutdown.
Auto Standby Mode, In this mode all internal circuitry is
0
1
powered down excluding the internal Reference. The AD7322
will enter Auto Standby Mode at the end of the Conversion after
the control register is updated.
0
0 Normal Mode, All internal Circuitry is powered up at all times.
Table 11. Sequencer Selection
Seq1 Seq2 Sequence type
0
0
The Channel Sequencer is not used. The Analog Channel selected by programming the ADD0 bit in the
Control Register selects the next channel for conversion.
1
0
This Configuration is used in conjunction with the Channel Address Bit in the Control Register. Provided that
the channel Address bit is 1, the ADC will convert firstly on channel 0 then channel 1 and will repeat this
sequence until the Seq bits are changed in the Control Register.
1
1
The Channel Sequencer is not used. The Analog Channel selected by programming the ADD0 bit in the
Control Register selects the next channel for conversion.
Rev. PrE | Page 13 of 18
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