DS28E02Q-TR データシートの表示（PDF） - Maxim Integrated
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DS28E02Q-TR Datasheet PDF : 21 Pages
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ABRIDGED DATA SHEET
1-Wire SHA-1 Authenticated 1Kb
EEPROM with 1.8V Operation
COMMAND LEVEL:
1-Wire ROM FUNCTION COMMANDS
(SEE FIGURE 10)
AVAILABLE COMMANDS:
READ ROM
MATCH ROM
SEARCH ROM
SKIP ROM
RESUME
OVERDRIVE-SKIP ROM
OVERDRIVE-MATCH ROM
DS28E02
DATA FIELD AFFECTED:
64-BIT REG. #, RC-FLAG
64-BIT REG. #, RC-FLAG
64-BIT REG. #, RC-FLAG
RC-FLAG
RC-FLAG
RC-FLAG, OD-FLAG
64-BIT REG.#, RC-FLAG, OD-FLAG
DEVICE-SPECIFIC MEMORY
FUNCTION COMMANDS
(SEE FIGURE 8)
Refer to the full data sheet.
Figure 2. Hierarchic Structure for 1-Wire Protocol
MSB
8-BIT
CRC CODE
MSB
LSB MSB
Figure 3. 64-Bit ROM
48-BIT SERIAL NUMBER
POLYNOMIAL = X8 + X5 + X4 + 1
LSB
8-BIT FAMILY CODE
LSB MSB
LSB
1ST
STAGE
2ND
STAGE
3RD
STAGE
4TH
STAGE
X0
X1
X2
X3
Figure 4. 1-Wire CRC Generator
5TH
STAGE
X4
6TH
STAGE
7TH
STAGE
8TH
STAGE
X5
X6
X7
X8
INPUT DATA
27: Understanding and Using Cyclic Redundancy
Checks with Maxim iButton Products.
The shift register bits are initialized to 0. Then, starting
with the least significant bit of the family code, one bit
at a time is shifted in. After the 8th bit of the family code
has been entered, the serial number is entered. After
the 48th bit of the serial number has been entered, the
shift register contains the CRC value. Shifting in the 8
bits of the CRC returns the shift register to all 0s.
Memory Access
The DS28E02 has four memory areas: data memory,
secrets memory, register page with special function
registers and user bytes, and a volatile scratchpad. The
data memory is organized as four pages of 32 bytes.
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