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DS1040M-500 データシートの表示(PDF) - Dallas Semiconductor -> Maxim Integrated

部品番号
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DS1040M-500
Dallas
Dallas Semiconductor -> Maxim Integrated 
DS1040M-500 Datasheet PDF : 6 Pages
1 2 3 4 5 6
POWER-UP TIMING DIAGRAM Figure 3
DS1040
TEST CIRCUIT Figure 4
TERMINOLOGY
Period: The time elapsed between the leading edge of the first trigger pulse and the leading edge of the
following trigger pulse.
tWIH , WIL , WO (Pulse Width): The elapsed time on the pulse between the 1.5V point on the leading edge
and the 1.5V point on the trailing edge, or the 1.5V point on the trailing edge and the 1.5V point on the
leading edge.
5 of 6

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