PSoC® 3: CY8C38 Family
Data Sheet
Description Title: PSoC® 3: CY8C38 Family Data Sheet Programmable System-on-Chip (PSoC®)
Document Number: 001-11729
*Q
3179219 22/02/2011 MKEA Updated conditions for flash data retention time
Updated 100-pin TQFP package spec.
Updated EEPROM AC specifications.
*R
3200146 03/28/2011 MKEA Removed Preliminary status from the data sheet.
Updated JTAG ID
Deleted Cin_G1, ADC input capacitance from Delta-Sigma ADC DC spec table
Updated JTAG Interface AC Specifications and SWD Interface Specifications
tables
Updated USBIO DC specs
Added 0.01 to max speed
Updated Features on page 1
Added Section 5.5, Nonvolatile Latches
Updated Flash AC specs
Added CAN DC specs
Updated delta-sigma graphs, noise histogram figures and RMS Noise spec
tables
Add reference to application note AN58304 in section 8.1
Updated 100-pin TQFP package spec
Added oscillator, I/O, VDAC, regulator graphs
Updated JTAG/SWD timing diagrams
Updated GPIO and SIO AC specs
Updated POR with Brown Out AC spec table
UpdatedIDAC graphs
Added DMA timing diagram, interrupt timing and interrupt vector, I2C timing
diagrams
Updated opamp graphs and PGA graphs
Added full chip performance graphs
Changed MHzECO range.
Added “Solder Reflow Peak Temperature” table.
Document Number: 001-11729 Rev. *R
Page 128 of 129
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