CY7C276-25HC データシートの表示（PDF） - Cypress Semiconductor
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CY7C276-25HC Datasheet PDF : 9 Pages
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Switching Waveforms
Read Operation Timing Diagram [6]
A13 − A0
tAA
D15 − D0
ADDR A
DATA A
Chip Select and Output Enable Timing Diagrams
CY7C276
ADDR B
tAA
DATA B
C276–6
A13 − A0
CS2 − CS0 INACTIVE
ACTIVE
OE
ACTIVE HIGH
D15 − D0
tCSOV
VALID
tOEZ
tOEV
HIGH Z
INACTIVE
tCSOZ
VALID
C276–7
Notes:
6. CS2 – CS0, OE assumed active.
Architecture Configuration Bits
The CY7C276 has four user-programmable options in addition
to the reprogrammable data array. For detailed programming
information contact your local Cypress representative.
The programmable options determine the active polarity for
the three chip selects (CS2 - CS0) and OE. When these con-
trol bits are programmed with a 0 the inputs are active LOW.
When these control bits are programmed with a 1 the inputs
are active HIGH.
Programming Information
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software pack-
ages, please see the PROM Programming Information located
at the end of this section. Programming algorithms can be ob-
tained from any Cypress representative.
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