CY7C008V データシートの表示（PDF） - Cypress Semiconductor

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CY7C008V

3.3V 64K/128K x 8/9 Dual-Port Static RAM

Cypress Semiconductor 

Switching Waveforms (continued)

Timing Diagram of Read with BUSY (M/S=HIGH)[36]

ADDRESSR

R/WR

tWC

MATCH

tPWE

DATA INR

tPS

ADDRESSL

BUSYL

DATAOUTL

MATCH

tBLA

CY7C008V/009V

CY7C018V/019V

tSD

tHD

VALID

tDDD

tBHA

tBDD

tWDD

VALID

Write Timing with Busy Input (M/S=LOW)

R/W

tWB

BUSY

tPWE

tWH

Note:

36. CEL = CER = LOW.

Document #: 38-06044 Rev. *C

Page 11 of 18

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