CY14B256KA(2009) データシートの表示（PDF） - Cypress Semiconductor
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CY14B256KA Datasheet PDF : 26 Pages
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CY14B256KA
AutoStore/Power Up RECALL
Parameters
Description
tHRECALL [18]
tSTORE [19]
tDELAY [20]
VSWITCH
tVCCRISE[9]
VHDIS[9]
tLZHSB[9]
tHHHD[9]
Power Up RECALL Duration
STORE Cycle Duration
Time Allowed to Complete SRAM Write Cycle
Low Voltage Trigger Level
VCC Rise Time
HSB Output Disable Voltage
HSB To Output Active Time
HSB High Active Time
Switching Waveforms
Min
Max
20
8
25
2.65
150
1.9
5
500
Figure 11. AutoStore or Power Up RECALL [21]
VCC
VSWITCH
VHDIS
HSB OUT
AutoStore
POWER-
UP
RECALL
Read & Write
Inhibited
(RWI)
VVCCRISE
tHHHD
Note19
tSTORE
tLZHSB
tHRECALL
tDELAY
tHHHD
Note19
tSTORE
Note22
tDELAY
tLZHSB
tHRECALL
POWER-UP
RECALL
Read & Write
BROWN POWER-UP
OUT
RECALL
AutoStore
Read & Write
POWER
DOWN
AutoStore
Unit
ms
ms
ns
V
µs
V
µs
ns
Notes
18. tHRECALL starts from the time VCC rises above VSWITCH.
19. If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware STORE takes place
20. On a Hardware Store and AutoStore initiation, SRAM write operation continues to be enabled for time tDELAY.
21. Read and Write cycles are ignored during STORE, RECALL, and while VCC is below VSWITCH.
22. HSB pin is driven HIGH to VCC only by internal 100 kΩ resistor, HSB driver is disabled.
Document #: 001-55720 Rev. *A
Page 20 of 26
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