CS5504 データシートの表示（PDF） - Cirrus Logic
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CS5504 Datasheet PDF : 24 Pages
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CS5504
CS5504
Converter Performance
The CS5504 A/D converter has excellent linear-
ity performance. Calibration minimizes the
errors in offset and gain. The CS5504 device
has no missing code performance to 20-bits.
The converter achieves Common Mode Rejec-
tion (CMR) at dc of 105 dB typical, and CMR at
50 and 60 Hz of 120 dB typical.
The CS5504 can experience some drift as tem-
perature changes. The CS5504 uses
chopper-stabilized techniques to minimize drift.
Measurement errors due to offset or gain drift
can be eliminated at any time by recalibrating
the converter.
Analog Input Impedance Considerations
The analog input of the CS5504 can be modeled
as illustrated in Figure 4 (the model ignores the
multiplexer switch resistance). Capacitors (15 pF
each) are used to dynamically sample each of
the inputs (AIN+ and AIN-). Every half XIN cy-
cle the switch alternately connects the capacitor
to the output of the buffer and then directly to
the AIN pin. Whenever the sample capacitor is
switched from the output of the buffer to the
AIN pin, a small packet of charge (a dynamic
demand of current) is required from the input
source to settle the voltage of the sample capaci-
AIN+
Vos
≤ 100
mV
+
-
AIN-
Vos
≤ 100
mV
+
-
15 pF
Internal
Bias
Voltage
15 pF
tor to its final value. The voltage on the output
of the buffer may differ up to 100 mV from the
actual input voltage due to the offset voltage of
the buffer. Timing allows one half of a XIN
clock cycle for the voltage on the sample capaci-
tor to settle to its final value.
An equation for the maximum acceptable source
resistance is derived.
Rsmax
=
2XI
N
(15pF
+
CEXT
)
−1
ln
Ve
+
Ve
15pF(100mv)
(15pF + CEXT
)
This equation assumes that the offset voltage of
the buffer is 100 mV, which is the worst case.
The value of Ve is the maximum error voltage
which is acceptable. CEXT is the combination
of any external or stray capacitance.
For a maximum error voltage (Ve) of 600 nV in
the CS5504 (1/4LSB at 20-bits), the above equa-
tion indicates that when operating from a
32.768 kHz XIN, source resistances up to 84 kΩ
in the CS5504 are acceptable in the absence of
external capacitance (CEXT = 0).
The VREF+ and VREF- inputs have nearly the
same structure as the AIN+ and AIN- inputs.
Therefore, the discussion on analog input imped-
ance applies to the voltage reference inputs as
well.
Digital Filter Characteristics
The digital filter in the CS5504 is the combina-
tion of a comb filter and a low pass filter. The
comb filter has zeros in its transfer function
which are optimally placed to reject line interfer-
ence frequencies (50 and 60 Hz and their
multiples) when the CS5504 is clocked at
Figure 4. Analog Input Model
DS126F12
13
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