CMPWR150 データシートの表示（PDF） - ON Semiconductor
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CMPWR150 Datasheet PDF : 15 Pages
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CMPWR150
Typical Thermal Characteristics
Thermal dissipation of junction heat consists primarily of two paths in series. The first path is the junction to
the case (θJC) thermal resistance, which is defined by the package style, and the second path is the case to
ambient (θCA) thermal resistance, which is dependent on board layout.
For a given package style and board layout, the operating junction temperature is a function of junction power
dissipation PJUNC and the ambient temperature, resulting in the following thermal equation:
TJUNC = TAMB + PJUNC (θJC ) + PJUNC (θCA)
Measurements showing performance up to maximum junction temperature of 125°C were performed under
light load conditions (5mA). This allows the ambient temperature to be representative of the internal junction
temperature.
Out Vo lt V T. eps
Figure 12. Output Voltage vs. Temperature
Output Voltage vs. Temperature. Figure 13 shows the regulator VOUT performance up to the maximum rated
junction temperature. The overall 100°C variation in junction temperature causes an output voltage change of
about 30mV, reflecting a voltage temperature coefficient of 90ppm/°C.
Output Voltage (500mA) vs. Temperature. Output Voltage (500mA) vs. Temperature shows the regulator steady
state performance when fully loaded (500mA) in an ambient temperature up to the rated maximum of 70°C.
The output variation at maximum load is approximately 25mV across the normal temperature range.
Out V R v T. eps
Figure 13. Output Voltage (500mA) vs. Temperature
Thresholds vs. Temperature. Figure 14 shows the regulator select/deselect threshold variation up to the
maximum rated junction temperature. The overall 100°C change in junction temperature causes a 30mV
variation in the select threshold voltage (regulator enable). The deselect threshold level varies about 50mV
over the 100°C change in junction temperature. This results in the built-in hysteresis having minimal variation
over the entire operating junction temperature range.
Rev. 3 | Page 12 of 15 | www.onsemi.com
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