CMPWR150
LoadStep.bmp
Figure 10. Load Step Response
Line Step Response. Figure 11 shows the output response of the regulator to a VCC line voltage transient
between 4.5V and 5.5V (1Vpp as shown on Ch1). The load condition during this test is 5mA. The output
response produces less than 10mV of disturbance on both edges indicating a line rejection of better than 40dB
at high frequencies.
VOUT offset = 3.3V
LineStep.bmp
Figure 11. Line Step Response
Rev. 3 | Page 11 of 15 | www.onsemi.com