Overview
Block Diagram
2543C–AVR–12/03
ATtiny2313/V
The ATtiny2313 is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle,
the ATtiny2313 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
Figure 2. Block Diagram
PA0 - PA2
PORTA DRIVERS
VCC
GND
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
8-BIT DATA BUS
PROGRAM
COUNTER
PROGRAM
FLASH
INSTRUCTION
REGISTER
INSTRUCTION
DECODER
CONTROL
LINES
PROGRAMMING
LOGIC
STACK
POINTER
SRAM
GENERAL
PURPOSE
REGISTER
ALU
STATUS
REGISTER
SPI
XTAL1
XTAL2
INTERNAL
CALIBRATED
OSCILLATOR
INTERNAL
OSCILLATOR
WATCHDOG
TIMER
MCU CONTROL
REGISTER
MCU STATUS
REGISTER
TIMER/
COUNTERS
INTERRUPT
UNIT
EEPROM
USI
OSCILLATOR
TIMING AND
CONTROL
RESET
ON-CHIP
DEBUGGER
USART
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
PORTB DRIVERS
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
PORTD DRIVERS
PB0 - PB7
PD0 - PD6
3