AT45DB161E データシートの表示（PDF） - Atmel Corporation

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AT45DB161E

16-Mbits DataFlash (with Extra 512-Kbits), 2.3V or 2.5V Minimum SPI Serial Flash Memory

Atmel Corporation 

6. Program and Erase Commands

6.1 Buffer Write

Data can be clocked in from the input pin (SI) into either Buffer 1 or Buffer 2.

To load data into a buffer using the standard DataFlash buffer size (528 bytes), an opcode 84h for Buffer 1 or 87h for

Buffer 2 must be clocked into the device followed by three address bytes comprised of 14 dummy bits and 10 buffer

address bits (BFA9 - BFA0). The 10 buffer address bits specify the first byte in the buffer to be written.

To load data into a buffer using the binary buffer size (512 bytes), an opcode 84h for Buffer 1 or 87h for Buffer 2, must be

clocked into the device followed by 15 dummy bits and nine buffer address bits (BFA8 - BFA0). The nine buffer address

bits specify the first byte in the buffer to be written.

After the last address byte has been clocked into the device data can then be clocked in on subsequent clock cycles. If

the end of the data buffer is reached, the device will wrap around back to the beginning of the buffer. Data will continue to

be loaded into the buffer until a low-to-high transition is detected on the CS pin.

6.2 Buffer to Main Memory Page Program with Built-In Erase

Data written into either Buffer 1 or Buffer 2 can be programmed into the main memory.

To perform a buffer to Main Memory Page Program with Built-In Erase using the standard DataFlash page size

(528 bytes), an opcode 83h for Buffer 1 or 86h for Buffer 2 must be clocked into the device followed by three address

bytes comprised of two dummy bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory to be

written, and 10 dummy bytes.

To perform a buffer to Main Memory Page Program with Built-In Erase using the binary page size (512 bytes), an opcode

83h for Buffer 1 or 86h for Buffer 2 must be clocked into the device followed by three address bytes comprised of three

dummy bits, 12 page address bits (A20 - A9) that specify the page in the main memory to be written, and nine dummy

bits.

When a low-to-high transition occurs on the CS pin, the part will first erase the selected page in main memory (the

erased state is a Logic 1) and then program the data stored in the buffer into the specified page in main memory. Both

the erasing and the programming of the page are internally self-timed and should take place in a maximum time of tEP.

During this time, the RDY/BUSY bit in the Status Register will indicate that the device is busy.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to erase or

program properly. If an erase programming error arises, it will be indicated by the EPE bit in the Status Register.

6.3 Buffer to Main Memory Page Program without Built-In Erase

A previously erased page within the main memory can be programmed with the contents of either Buffer 1 or Buffer 2.

To perform a buffer to Main Memory Page Program using the standard DataFlash page size (528 bytes), an opcode 88h

for Buffer 1 or 89h for Buffer 2 must be clocked into the device followed by three address bytes comprised of two dummy

bits, 12 page address bits (PA11 - PA0) that specify the page in the main memory to be written, and 10 dummy bits.

To perform a buffer to Main Memory Page Program using the binary page size (512 bytes), an opcode 88h for Buffer 1 or

89h for Buffer 2 must be clocked into the device followed by three address bytes comprised of three dummy bits, 12 page

address bits (A20 - A9) that specify the page in the main memory to be written, and nine dummy bits.

When a low-to-high transition occurs on the CS pin, the part will program the data stored in the buffer into the specified

page in the main memory. It is necessary for the page in main memory that is being programmed to have been

previously erased using one of the erase commands (Page Erase, Block Erase, Sector Erase, or Chip Erase). The

programming of the page is internally self-timed and should take place in a maximum time of tP. During this time, the

RDY/BUSY bit in the Status Register will indicate that the device is busy.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to erase or

program properly. If an erase programming error arises, it will be indicated by the EPE bit in the Status Register.

Atmel AT45DB161E [PRELIMINARY DATASHEET] 10

8782A–DFLASH–3/12

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