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AP2141FM データシートの表示(PDF) - Diodes Incorporated.

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AP2141FM Datasheet PDF : 19 Pages
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AP2141/AP2151
0.5A SINGLE CHANNEL CURRENT-LIMITED POWER
SWITCH
Electrical Characteristics
(TA = 25°C, VIN = +5.0V, unless otherwise stated)
Symbol
Parameter
Test Conditions
Min Typ. Max Unit
VUVLO Input UVLO
Rload=1k
1.6 1.9 2.5 V
ISHDN Input Shutdown Current
Disabled, IOUT= 0
0.5 1 μA
IQ Input Quiescent Current
Enabled, IOUT= 0
45 70 μA
ILEAK Input Leakage Current
Disabled, OUT grounded
1 μA
IREV Reverse Leakage Current
Disabled, VIN= 0V, VOUT= 5V, IREV at VIN
1
μA
RDS(ON) Switch on-resistance
VIN = 5V,
IOUT= 0.5A
SOT25, MSOP-8L-EP,
TA = 25°C SOP-8L
DFN2018-6
-40°C TA 85°C
95 115
90 110
140 m
VIN = 3.3V, TA = 25°C
IOUT= 0.5A -40°C TA 85°C
120 140
170
ISHORT Short-Circuit Current Limit Enabled into short circuit, CL=22μF
0.6
A
ILIMIT Over-Load Current Limit
VIN= 5V, VOUT= 4.8V, CL=22μF, -40°C TA 85°C 0.6 0.8 1.0 A
ITrig
Current limiting trigger
threshold
Output Current Slew rate (<100A/s) , CL=22μF
1.0
A
VIL EN Input Logic Low Voltage VIN = 2.7V to 5.5V
0.8 V
VIH EN Input Logic High Voltage VIN = 2.7V to 5.5V
2
V
ISINK EN Input leakage
VEN = 5V
1 μA
TD(ON) Output turn-on delay time
CL=1μF, Rload=10
0.05
ms
TR Output turn-on rise time
CL=1μF, Rload=10
0.6 1.5 ms
TD(OFF) Output turn-off delay time
CL=1μF, Rload=10
0.01
ms
TF Output turn-off fall time
CL=1μF, Rload=10
0.05 0.1 ms
RFLG FLG output FET on-resistance IFLG =10mA
20 40
TBlank FLG blanking time
CIN=10uF, CL=22μF
4
7 15 ms
TSHDN Thermal Shutdown Threshold Enabled, Rload=1k
140
°C
THYS Thermal Shutdown Hysteresis
25
°C
SOP-8L (Note 4)
110
oC/W
θJA
Thermal Resistance
Junction-to-Ambient
MSOP-8L-EP (Note 5)
SOT25 (Note 6)
60
oC/W
157
oC/W
DFN2018-6 (Note 7)
70
oC/W
Notes:
4. Test condition for SOP-8L: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.
5. Test condition for MSOP-8L-EP: Device mounted on 2” x 2” FR-4 substrate PC board, 2oz copper, with minimum recommended pad on top
layer and thermal vias to bottom layer ground plane.
6. Test condition for SOT25: Device mounted on FR-4, 2oz copper, with minimum recommended pad layout.
7. Test condition for DFN2018-6: Device mounted on FR-4 2-layer board, 2oz copper, with minimum recommended pad on top layer and 3 vias
to bottom layer 1.0”x1.4” ground plane.
AP2141/AP2151 Rev. 6
DS31562
5 of 19
www.diodes.com
JUNE 2009
© Diodes Incorporated

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