ADT7481(2014) データシートの表示（PDF） - ON Semiconductor
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ADT7481 Datasheet PDF : 20 Pages
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ADT7481
Table 5. ELECTRICAL CHARACTERISTICS (TA = −40°C to +120°C, VDD = 3.0 V to 3.6 V, unless otherwise noted)
Parameter
Conditions
Min Typ Max Unit
Power Supply
Supply Voltage, VDD
Average Operating Supply Current, IDD
Undervoltage Lockout Threshold
Power-On-Reset Threshold
0.0625 Conversions/Sec Rate (Note 1)
Standby Mode
VDD Input, Disables ADC, Rising Edge
3.0 3.30 3.6
V
−
3.0
4.0
mA
−
5.0
30
mA
−
2.55
−
V
1.0
−
2.5
V
Temperature-to-Digital Converter
Local Sensor Accuracy (Note 2)
Resolution
Remote Diode Sensor Accuracy (Note 2)
Resolution
Remote Sensor Source Current
0°C ≤ TA ≤ +70°C
0°C ≤ TA ≤ +85°C
−40 ≤ TA ≤ +100°C
0°C ≤ TA ≤ +70°C, −55°C ≤ TD (Note 3) ≤ +150°C
0°C ≤ TA ≤ +85°C, −55°C ≤ TD (Note 3) ≤ +150°C
−40°C ≤ TA ≤ +100°C, −55°C ≤ TD (Note 3) ≤ +150°C
High Level (Note 4)
−
−
±1
°C
−
−
±1.5
−
−
±2.5
−
1.0
−
°C
−
−
±1
°C
−
−
±1.5
−
−
±2.5
−
0.25
−
°C
−
233
−
mA
Conversion Time
Low Level (Note 4)
From Stop Bit to Conversion Complete (Both
Channels) One-shot Mode with Averaging
Switched On
−
14
−
mA
−
73
94
ms
One-shot Mode with Averaging Off
(Conversion Rate = 16, 32, or 64 Conversions
per Second)
−
11
14
ms
Open-Drain Digital Outputs (THERM, ALERT/THERM2)
Output Low Voltage, VOL
High Level Output Leakage Current, IOH
SMBus Interface (Notes 4 and 5)
IOUT = −6.0 mA
VOUT = VDD
−
−
0.4
V
−
0.1
1.0
mA
Logic Input High Voltage, VIH
SCLK, SDATA
2.1
−
−
V
Logic Input Low Voltage, VIL
SCLK, SDATA
−
−
0.8
V
Hysteresis
SDA Output Low Voltage, VOL
Logic Input Current, IIH, IIL
SMBus Input Capacitance,
SCLK, SDATA
IOUT = −6.0 mA
−
500
−
mV
−
−
0.4
V
−1.0
−
+1.0 mA
−
5.0
−
pF
SMBus Clock Frequency
−
−
400 kHz
SMBus Timeout (Note 6)
User Programmable
SCLK Falling Edge to SDATA Valid Time Master Clocking in Data
1. See Table 11 for information on other conversion rates.
2. Averaging enabled.
3. Guaranteed by characterization, not production tested.
4. Guaranteed by design, not production tested.
5. See Timing Specifications section for more information.
6. Disabled by default. See the Serial Bus Interface section for details to enable it.
−
25
32
ms
−
−
1.0
ms
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