AD9517-1ABCPZ-RL7 HTML VIEW PDF DOWNLOAD, AD9517-1ABCPZ-RL7 データシート

AD9517-1ABCPZ-RL7 データシートの表示（PDF） - Analog Devices

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AD9517-1ABCPZ-RL7

12-Output Clock Generator with Integrated 2.5 GHz VCO

Analog Devices

AD9517-1ABCPZ-RL7 Datasheet PDF : 80 Pages

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AD9517-1

Data Sheet

Parameter

CLK = 1 GHz, Output = 50 MHz

Divider = 20

At 10 Hz Offset

At 100 Hz Offset

At 1 kHz Offset

At 10 kHz Offset

At 100 kHz Offset

At 1 MHz Offset

>10 MHz Offset

Min

Typ

Max Unit

Test Conditions/Comments

Input slew rate > 1 V/ns

−124

−134

−142

−151

−157

−160

−163

dBc/Hz

CLOCK OUTPUT ABSOLUTE PHASE NOISE (INTERNAL VCO USED)

Table 7.

Parameter

Min

LVPECL ABSOLUTE PHASE NOISE

VCO = 2.65 GHz; Output = 2.65 GHz

At 1 kHz Offset

At 10 kHz Offset

At 100 kHz Offset

At 1 MHz Offset

At 10 MHz Offset

At 40 MHz Offset

VCO = 2.475 GHz; Output = 2.45 GHz

At 1 kHz Offset

At 10 kHz Offset

At 100 kHz Offset

At 1 MHz Offset

At 10 MHz Offset

At 40 MHz Offset

VCO = 2.3 GHz; Output = 2.3 GHz

At 1 kHz Offset

At 10 kHz Offset

At 100 kHz Offset

At 1 MHz Offset

At 10 MHz Offset

At 40 MHz Offset

Typ

−46

−76

−104

−123

−140

−146

−47

−77

−105

−124

−141

−146

−54

−78

−106

−125

−141

−146

Max Unit

Test Conditions/Comments

Internal VCO; direct to LVPECL output

dBc/Hz

Rev. E | Page 10 of 80

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