AD9228
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = −0.5 dBFS, unless otherwise noted.
Table 1.
Parameter1
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Offset Matching
Gain Error
Gain Matching
Differential Nonlinearity (DNL)
Integral Nonlinearity (INL)
TEMPERATURE DRIFT
Offset Error
Gain Error
Reference Voltage (1 V Mode)
REFERENCE
Output Voltage Error (VREF = 1 V)
Load Regulation at 1.0 mA (VREF = 1 V)
Input Resistance
ANALOG INPUTS
Differential Input Voltage (VREF = 1 V)
Common-Mode Voltage
Differential Input Capacitance
Analog Bandwidth, Full Power
POWER SUPPLY
AVDD
DRVDD
IAVDD
IDRVDD
Total Power Dissipation (Including Output Drivers)
Power-Down Dissipation
Standby Dissipation2
CROSSTALK
CROSSTALK (Overrange Condition)3
AD9228-40
AD9228-65
Temperature Min Typ
Max Min Typ
Max Unit
12
12
Bits
Full
Guaranteed
Guaranteed
Full
±1
±8
±1
±8 mV
Full
±2
±8
±2
±8 mV
Full
±0.4
±1.2
±2
±3.5 % FS
Full
±0.3
±0.7
±0.3
±0.7 % FS
Full
±0.25 ±0.5
±0.3
±0.65 LSB
Full
±0.4
±1
±0.4
±1 LSB
Full
±2
Full
±17
Full
±21
±2
ppm/°C
±17
ppm/°C
±21
ppm/°C
Full
±2
±30
±2
±30 mV
Full
3
3
mV
Full
6
6
kΩ
Full
2
2
V p-p
Full
AVDD/2
AVDD/2
V
Full
7
7
pF
Full
315
315
MHz
Full
1.7 1.8
1.9 1.7 1.8
1.9 V
Full
1.7 1.8
1.9 1.7 1.8
1.9 V
Full
155
170
232
245 mA
Full
31
34
34
38 mA
Full
335
367
478
510 mW
Full
2
5.8
2
5.8 mW
Full
72
72
mW
Full
−100
−100
dB
Full
−100
−100
dB
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for definitions and for details on how these tests were completed.
2 Can be controlled via the SPI.
3 Overrange condition is specific with 6 dB of the full-scale input range.
Rev. B | Page 3 of 52