74VCX16838MTD(2000) データシートの表示（PDF） - Fairchild Semiconductor

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74VCX16838MTD
(Rev.:2000)

Low Voltage 16-Bit Selectable Register/Buffer with 3.6V Tolerant Inputs and Outputs

Fairchild Semiconductor 

Connection Diagram

Logic Diagram

Truth Table

Inputs

Outputs

CP

REGE

In

OE

On

↑

H

H

L

H

↑

H

L

L

L

X

L

H

L

H

X

L

L

L

L

X

X

X

H

Z

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial (HIGH or LOW, inputs may not float)

Z = High Impedance

Functional Description

The 74VCX16838 consists of sixteen selectable non-

inverting buffers or registers with word wide controls. Mode

functionality is selected through operation of the CP and

REGE pin as shown by the truth table. When REGE is held

at a logic “1” the device operates as a 16-bit register. Data

is transferred from In to On on the rising edge of the CP pin.

When the REGE pin is held at a logic “0” the device oper-

ates in a flow through mode and data propagates directly

from the I to the O outputs. All outputs can be 3-STATE by

holding the OE pin at a logic “1.”

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