74LVQ273M データシートの表示（PDF） - STMicroelectronics
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74LVQ273M Datasheet PDF : 13 Pages
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74LVQ273
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
PIN No
1
2, 5, 6, 9, 12,
15, 16,19
3, 4, 7, 8, 13,
14, 17, 18
11
10
20
SYMBOL
CLEAR
Q0 to Q7
NAME AND FUNCTION
Asynchronous Master
Reset (Active LOW)
Flip-Flop Outputs
D0 to D7 Data Inputs
CLOCK
GND
VCC
Clock Input (LOW-to-HIGH
Edge Triggered)
Ground (0V)
Positive Supply Voltage
Table 3: Truth Table
CLEAR
L
H
H
H
INPUTS
D
X
L
H
X
X : Don’t Care
Figure 3: Logic Diagram
CLOCK
X
OUTPUT
Q
L
L
H
Qn
FUNCTION
CLEAR
NO CHANGE
This logic diagram has not be used to estimate propagation delays
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