74LVC3G14DP,125 データシートの表示（PDF） - NXP Semiconductors.

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74LVC3G14DP,125

Triple inverting Schmitt trigger with 5 V tolerant input

NXP Semiconductors. 

NXP Semiconductors

74LVC3G14

Triple inverting Schmitt trigger with 5 V tolerant input

4. Ordering information

Table 1. Ordering information

Type number Package

Temperature range Name Description

74LVC3G14DP −40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads;

body width 3 mm; lead length 0.5 mm

74LVC3G14DC −40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads;

body width 2.3 mm

74LVC3G14GT −40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads;

8 terminals; body 1 × 1.95 × 0.5 mm

74LVC3G14GD −40 °C to +125 °C XSON8U plastic extremely thin small outline package; no leads;

8 terminals; UTLP based; body 3 × 2 × 0.5 mm

74LVC3G14GM −40 °C to +125 °C XQFN8U plastic extremely thin quad flat package; no leads;

8 terminals; UTLP based; body 1.6 × 1.6 × 0.5 mm

5. Marking

Version

SOT505-2

SOT765-1

SOT833-1

SOT996-2

SOT902-1

Table 2. Marking codes

Type number

74LVC3G14DP

74LVC3G14DC

74LVC3G14GT

74LVC3G14GD

74LVC3G14GM

6. Functional diagram

Marking code

V14

V14

V14

V14

V14

1A

1Y

3Y

3A

2A

2Y

001aah728

Fig 1. Logic symbol

001aah729

Fig 2. IEC logic symbol

A

Y

mna025

Fig 3. Logic diagram

(one Schmitt trigger)

74LVC3G14_7

Product data sheet

Rev. 07 — 12 June 2008

© NXP B.V. 2008. All rights reserved.

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