NXP Semiconductors
74LVC16244A; 74LVCH16244A
16-bit buffer/line driver; 5 V input/output tolerant; 3-state
VCC
data input
Fig 3. Bus hold circuit
5. Pinning information
5.1 Pinning
to internal circuit
mna705
1OE 1
1Y0 2
1Y1 3
GND 4
1Y2 5
1Y3 6
VCC 7
2Y0 8
2Y1 9
GND 10
2Y2 11
2Y3 12
3Y0 13
3Y1 14
GND 15
3Y2 16
3Y3 17
VCC 18
4Y0 19
4Y1 20
GND 21
4Y2 22
4Y3 23
4OE 24
74LVC16244A
74LVCH16244A
48 2OE
47 1A0
46 1A1
45 GND
44 1A2
43 1A3
42 VCC
41 2A0
40 2A1
39 GND
38 2A2
37 2A3
36 3A0
35 3A1
34 GND
33 3A2
32 3A3
31 VCC
30 4A0
29 4A1
28 GND
27 4A2
26 4A3
25 3OE
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Fig 4. Pin configuration SOT370-1 (SSOP48) and
SOT362-1 (TSSOP48)
74LVC16244A
ball A1 74LVCH16244A
index area
123456
A
B
C
D
E
F
G
H
J
K
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Transparent top view
Fig 5. Pin configuration SOT702-1 (VFBGA56)
74LVC_LVCH16244A_9
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 09 — 18 March 2010
© NXP B.V. 2010. All rights reserved.
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