Philips Semiconductors
Hex buffer/line driver (3-State)
TEST CIRCUIT
PULSE
GENERATOR
VI
RT
VCC
D.U.T.
S1
2 * VCC
Open
GND
VO
RL = 1k
50pF
CL
RL = 1k
Test Circuit for switching times
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of pulse generators.
SWITCH POSITION
TEST
S1
VCC
VI
tPLH/tPHL
Open
< 2.7V
VCC
tPLZ/tPZL
tPHZ/tPZH
2 < VCC
GND
2.7–3.6V
2.7V
SV00895
Figure 3. Load circuitry for switching times
Product specification
74LV365
1998 May 29
7