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74LCX16652MTD_Q データシートの表示(PDF) - Fairchild Semiconductor

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74LCX16652MTD_Q Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Connection Diagram
Truth Table
(Note 2)
Inputs
OEAB OEBA1 CPAB1 CPBA1 SAB1 SBA1
Inputs/Outputs
A0 thru A7
B0 thru B7
Operating Mode
L
L
X
H
L
L
H
H
H
H
X
L
H or L H or L
 H or L
  H or L
X
X
X
X
X
X
X
Input
Input
Isolation
X
Store A and B Data
X
Input
Not Specified Store A, Hold B
X
Input
Output
Store A in Both Registers
X
Not Specified
Input
Hold A, Store B
X
Output
Input
Store B in Both Registers
L
L
X
X
X
L
Output
Input
Real-Time B Data to A Bus
L
L
X H or L X
H
Store B Data to A Bus
H
H
X
X
L
X
Input
Output
Real-Time A Data to B Bus
H
H H or L X
H
X
Stored A Data to B Bus
H
L H or L H or L H
H
Output
Output
Stored A Data to B Bus and
Stored B Data to A Bus
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Clock Transition
Note 2: The data output functions may be enabled or disabled by various signals at OEAB or OEBA inputs. Data input functions are always enabled, i.e.,
data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs. This also applies to data I/O (A and B: 815) and #2 control pins.
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