74F244SJ(1999) データシートの表示（PDF） - Fairchild Semiconductor
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74F244SJ Datasheet PDF : 7 Pages
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Logic Symbols
IEEE/IEC
74F240
IEEE/IEC
74F241
IEEE/IEC
74F244
Unit Loading/Fan Out
Pin Names
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
OE1, OE2
3-STATE Output Enable Input (Active LOW)
1.0/1.667
20 µA/−1 mA
OE2
3-STATE Output Enable Input (Active HIGH)
1.0/1.667
20 µA/−1 mA
I0–I7
Inputs (74F240)
1.0/1.667 (Note 1)
20 µA/−1 mA
I0–I7
Inputs (74F241, 74F244)
1.0/2.667 (Note 1) 20 µA/−1.6 mA
O0–O7, O0–O7 Outputs
600/106.6 (80) −12 mA/64 mA (48 mA)
Note 1: Worst-case 74F240 enabled; 74F241, 74F244 disabled
Truth Tables
74F240
74F244
OE1
D1n
O1n
OE2
D2n
O2n
OE1
D1n
O1n
OE2
D2n
O2n
H
X
Z
H
X
Z
H
X
Z
H
X
Z
L
H
L
L
H
L
L
H
H
L
H
H
L
L
H
L
L
H
L
L
L
L
L
L
OE1
H
D1n
X
74F241
O1n
OE2
Z
L
D2n
X
O2n
Z
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
Z = High Impedance
L
H
H
H
H
H
L
L
L
H
L
L
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