Philips Semiconductors
8-bit serial-in/parallel-out shift register
Product specification
74AHC164; 74AHCT164
handbook, full pagewidth
Vi
CP input
GND
Vi
Dn input
GND
VOH
Qn output
VOL
VM(1)
t su
th
VM(1)
VM(2)
t su
th
MNA602
FAMILY
AHC
AHCT
VI INPUT
VM(1)
REQUIREMENTS INPUT
GND to VCC
GND to 3.0 V
50% VCC
1.5 V
VM(2)
OUTPUT
50% VCC
50% VCC
The shaded areas indicate when the input is permitted to change for
predictable output performance.
Fig.8 The data set-up (tsu) and hold (th) times for the (Dn) input.
handbook, full pagewidth
VI
PULSE
GENERATOR
VCC
VO
D.U.T.
RT
S1
1000 Ω
VCC
open
GND
CL
MNA219
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
open
VCC
GND
2000 Aug 15
Definitions for test circuit.
CL = load capacitance including jig and probe capacitance (see Chapter “AC characteristics”).
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
Fig.9 Load circuit for switching times.
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