HUF75307T3ST データシートの表示（PDF） - Fairchild Semiconductor
部品番号
コンポーネント説明
メーカー
HUF75307T3ST Datasheet PDF : 9 Pages
| |||
HUF75307T3ST
Test Circuits and Waveforms (Continued)
VGS
VGS
RGS
VDS
RL
DUT
+
VDD
-
VDS
tON
td(ON)
tr
90%
tOFF
td(OFF)
tf
90%
10%
0
VGS
10%
0
50%
PULSE WIDTH
10%
90%
50%
FIGURE 18. SWITCHING TIME TEST CIRCUIT
Thermal Resistance vs. Mounting Pad Area
The maximum rated junction temperature, TJ(MAX), and the
thermal resistance of the heat dissipating path determines
the maximum allowable device power dissipation, PD(MAX),
in an application. Therefore the application’s ambient
temperature, TA (oC), and thermal resistance RθJA (oC/W)
must be reviewed to ensure that TJ(MAX) is never exceeded.
Equation 1 mathematically represents the relationship and
serves as the basis for establishing the rating of the part.
PD(MAX)
=
-(--T----J---(---M-----A-----X----)----–----T----A-----)
RθJA
(EQ. 1)
In using surface mount devices such as the SOT-223
package, the environment in which it is applied will have a
significant influence on the part’s current and maximum
power dissipation ratings. Precise determination of the
PD(MAX) is complex and influenced by many factors:
1. Mounting pad area onto which the device is attached and
whether there is copper on one side or both sides of the
board.
2. The number of copper layers and the thickness of the
board.
3. The use of external heat sinks.
4. The use of thermal vias.
5. Air flow and board orientation.
6. For non steady state applications, the pulse width, the
duty cycle and the transient thermal response of the part,
the board and the environment they are in.
Fairchild provides thermal information to assist the
designer’s preliminary application evaluation. Figure 20
defines the RθJA for the device as a function of the top
copper (component side) area. This is for a horizontally
positioned FR-4 board with 1oz copper after 1000 seconds
FIGURE 19. RESISTIVE SWITCHING WAVEFORMS
of steady state power with no air flow. This graph provides
the necessary information for calculation of the steady state
junction temperature or power dissipation. Pulse applications
can be evaluated using the Fairchild device Spice thermal
model or manually utilizing the normalized maximum
transient thermal impedance curve.
200
RθJA = 75.9 -19.3 ln(AREA)
150
147oC/W - 0.026in2
128oC/W - 0.068in2
110oC/W - 0.171in2
100
50
0.01
0.1
1.0
AREA, TOP COPPER AREA (in2)
FIGURE 20. THERMAL RESISTANCE vs MOUNTING PAD
AREA
Displayed on the curve are the three RθJA values listed in
the Electrical Specifications table. The three points were
chosen to depict the compromise between the copper board
area, the thermal resistance and ultimately the power
dissipation, PD(MAX). Thermal resistances corresponding to
other component side copper areas can be obtained from
Figure 20 or by calculation using Equation 2. The area, in
square inches is the top copper area including the gate and
source pads.
RθJA = 75.9 – 19.3 × ln (Area)
(EQ. 2)
©2001 Fairchild Semiconductor Corporation
HUF75307T3ST Rev. B
Share Link: 