100336 データシートの表示（PDF） - Fairchild Semiconductor

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100336

Low Power 4-Stage Counter/Shift Register

Fairchild Semiconductor 

Switching Waveforms (Continued)

Note:

*Decimal representation of binary outputs.

Count Up: S0 = L, S1 = H, S2 = H; Count Down: S0 = L, S1 = L, S2 = H.

Measurement taken at 50% point of waveform.

FIGURE 9. Propagation Delay, Clock to Terminal Count (Count Up and Count Down Modes)

Note: Shift Right Mode; S0 = H, S1 = H, S2 = L.

FIGURE 10. Propagation Delay, Master Reset to Terminal Count (Shift Right Mode)

Note: Shift Left Mode; S0 = L, S1 = H, S2 = L.

FIGURE 11. Propagation Delay, Master Reset to Terminal Count (Shift Left Mode)

Note:

*Decimal representation of binary outputs. Count Up Mode: S0 = L, S1 = H, S2 = H.

Note:

*Decimal representation of binary outputs. Count Down Mode: S0 = L, S1 = L, S2 = H.

FIGURE 12. Propagation Delay, Master Reset to Terminal Count (Count Up and Count Down Modes)

11

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