P75NS04Z データシートの表示（PDF） - STMicroelectronics

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P75NS04Z

N-channel Clamped - 7mΩ - 80A - TO-220 Fully protected MESH Overlay™ III Power MOSFET

STMicroelectronics 

Electrical characteristics

2

Electrical characteristics

STP75NS04Z

(TCASE=25°C unless otherwise specified)

Table 4. On/off states

Symbol

Parameter

V(BR)DSS

Drain-source breakdown

voltage

IDSS

Zero gate voltage drain

current (VGS = 0)

IGSS

Gate body leakage current

(VDS = 0)

VGSS

Gate threshold breakdown

voltage

VGS(th) Gate threshold voltage

RDS(on)

Static drain-source on

resistance

Test condictions

ID = 1mA, VGS= 0

VDS = 16V

VGS = ±10V

IGS= ±100µA

VDS= VGS, ID = 250µA

VGS= 10V, ID= 40A

Table 5. Dynamic

Symbol

Parameter

Test condictions

gfs (1) Forward transconductance VDS =15V, ID = 15A

Ciss

Coss

Crss

Input capacitance

Output capacitance

Reverse transfer

capacitance

VDS = 25V, f = 1 MHz,

VGS =0

Qg Total gate charge

Qgs Gate-source charge

Qgd Gate-drain charge

VDD= 20V, ID= 80 A,

VGS= 10 V

(see Figure 13)

1. Pulsed: pulse duration=300µs, duty cycle 1.5%

Min. Typ. Max. Unit

33

V

1 µA

2

µA

18

V

2

3

4

V

7 11 mΩ

Min. Typ. Max. Unit

50

S

1860

pF

628

pF

196

pF

50

nC

14

nC

16

nC

4/12

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