MT48LC16M16A2P-75(2005) データシートの表示（PDF） - Micron Technology

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MT48LC16M16A2P-75
(Rev.:2005)

256Mb: x4, x8, x16 SDRAM

Micron Technology 

tered, the data inputs will be ignored, and WRITEs will

not be executed. An example is shown in Figure 23.

Data n + 1 is either the last of a burst of two or the last

desired of a longer burst.

Data for a fixed-length WRITE burst may be fol-

lowed by, or truncated with, a PRECHARGE command

to the same bank (provided that auto precharge was

not activated), and a full-page WRITE burst may be

truncated with a PRECHARGE command to the same

bank. The PRECHARGE command should be issued

tWR after the clock edge at which the last desired input

data element is registered. The auto precharge mode

requires a tWR of at least one clock plus time, regardless

of frequency. In addition, when truncating a WRITE

burst, the DQM signal must be used to mask input data

for the clock edge prior to, and the clock edge coinci-

Figure 22: Random WRITE Cycles

T0

T1

T2

T3

CLK

COMMAND

WRITE

WRITE

WRITE

WRITE

ADDRESS

BANK,

COL n

BANK,

COL a

BANK,

COL x

BANK,

COL m

DQ

DIN

n

DIN

DIN

a

x

TRANSITIONING DATA

DIN

m

DON’T CARE

Figure 23: WRITE To READ

T0

T1

T2

T3

T4

T5

CLK

COMMAND

WRITE

NOP

READ

NOP

NOP

NOP

ADDRESS

BANK,

COL n

DQ

DIN

n

BANK,

COL b

DIN

n+1

TRANSITIONING DATA

DOUT

b

DOUT

b+1

DON’T CARE

256Mb: x4, x8, x16

SDRAM

dent with, the PRECHARGE command. An example is

shown in Figure 24. Data n + 1 is either the last of a burst

of two or the last desired of a longer burst. Following the

PRECHARGE command, a subsequent command to

the same bank cannot be issued until tRP is met. The

precharge can be issued coincident with the first coin-

cident clock edge (T2 in Figure 24) on an A1 Version and

with the second clock on an A2 Version (Figure 24.)

In the case of a fixed-length burst being executed to

completion, a PRECHARGE command issued at the

optimum time (as described above) provides the same

operation that would result from the same fixed-length

burst with auto precharge. The disadvantage of the

PRECHARGE command is that it requires that the com-

mand and address buses be available at the appropri-

ate time to issue the command; the advantage of the

PRECHARGE command is that it can be used to trun-

cate fixed-length or full-page bursts.

Fixed-length or full-page WRITE bursts can be trun-

cated with the BURST TERMINATE command. When

truncating a WRITE burst, the input data applied coin-

cident with the BURST TERMINATE command will be

Figure 24: WRITE To PRECHARGE

T0

CLK

tWR @ tCLK ≥ 15ns

DQM

COMMAND

WRITE

T1

T2

T3

T4

NOP

PRECHARGE

t RP

NOP

NOP

ADDRESS

BANK a,

COL n

DQ

DIN

n

BANK

(a or all)

DIN

n+1

t WR

T5

T6

ACTIVE

NOP

BANK a,

ROW

tWR = tCLK < 15ns

DQM

COMMAND

WRITE

NOP

ADDRESS

BANK a,

COL n

DQ

DIN

n

DIN

n+1

NOP

PRECHARGE

t RP

NOP

NOP

BANK

(a or all)

t WR

ACTIVE

BANK a,

ROW

TRANSITIONING DATA

DON’T CARE

NOTE: DQM could remain LOW in this example if the WRITE burst is a fixed length of two.

PDF: 09005aef8091e6d1/Source: 09005aef8091e6a8

256MSDRAM.pmd – Rev. H; Pub. 2/05

26

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