MAX6496ATA/V-T(2012) データシートの表示（PDF） - Maxim Integrated

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MAX6496ATA/V-T
(Rev.:2012)

72V, Overvoltage-Protection Switches/Limiter Controllers with an External MOSFET

Maxim Integrated 

72V, Overvoltage-Protection Switches/

Limiter Controllers with an External MOSFET

• The overvoltage waveform period (tOV)

• The power dissipated across the package (PDISS)

During an initial overvoltage occurrence, the discharge

time (∆t1) of COUT, caused by IOUT and IGATEPD. The

discharge time is approximately:

∆t1

=

COUT

VOV × 0.05

(IOUT + IGATEPD)

where VOV is the overvoltage threshold, IOUT is the load

current, and IGATEPD is the GATE’s 100mA pulldown

current.

Upon OUT falling below the threshold point, the

MAX6495/MAX6496/MAX6499s’ charge-pump current

must recover and begins recharging the external GATE

voltage. The time needed to recharge GATE from -VD to

the MOSFET’s gate threshold voltage is:

∆t2

= CISS

VGS(TH) + VD

IGATE

where CISS is the MOSFET’s input capacitance,

VGS(TH) is the MOSFET’s gate threshold voltage, VD is

the internal clamp (from OUTFB to GATE) diode’s for-

ward voltage (1.5V, typ) and IGATE is the charge-pump

current (100µA typ).

During ∆t2, COUT loses charge through the output load.

The voltage across COUT (∆V2) decreases until the

MOSFET reaches its VGS(TH) threshold and can be

approximated using the following formula:

GATE

∆t2

OUTFB

∆t1

∆t3

∆tOV

Figure 5. MAX6495/MAX6496/MAX6499 Timing

∆V2

= IOUT

∆t2

COUT

Once the MOSFET VGS(TH) is obtained, the slope of the

output-voltage rise is determined by the MOSFET Qg

charge through the internal charge pump with respect

to the drain potential. The new rise time needed to

reach a new overvoltage event can be calculated using

the following formula:

∆t3

≅

QGD

VGS

∆VOUT

IGATE

where QGD is the gate-to-drain charge.

The total period of the overvoltage waveform can be

summed up as follows:

∆tOV = ∆t1 + ∆t2 + ∆t3

The MAX6495/MAX6496/MAX6499 dissipate the most

power during an overvoltage event when IOUT = 0. The

maximum power dissipation can be approximated

using the following equation:

PDISS

=

VOV

× 0.975 × IGATEPD ×

∆t1

∆tOV

The die-temperature increase is related to θJC (8.3°C/W

and 8.5°C/W for the MAX6495/MAX6496/MAX6499,

respectively) of the package when mounted correctly

with a strong thermal contact to the circuit board. The

MAX6495/MAX6496/MAX6499 thermal shutdown is

governed by the equation:

TJ = TA + PDISS (θJC +θCA) < +170°C

Based on these calculations, the parameters of the

MOSFET, the overvoltage threshold, the output load

current, and the output capacitors are external vari-

ables affecting the junction temperature. If these para-

meters are fixed, the junction temperature can also be

affected by increasing ∆t3, which is the time the switch

is on. By increasing the capacitance at the GATE pin,

∆t3 increases as it increases the amount of time

required to charge up this additional capacitance

(75µA gate current). As a result, ∆tOV increases, there-

by reducing the power dissipated (PDISS).

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