Single/Dual/Quad, Low-Cost, Single-Supply,
Rail-to-Rail Op Amps with Shutdown
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +5V, VSS = 0, VCM = 0, VOUT = VDD/2, RL = ∞ connected to VDD/2, SHDN = VDD (MAX4401 only), TA = +25°C, unless
otherwise noted.)
PARAMETER
Input Voltage Noise Density
Input Current Noise Density
Capacitive-Load Stability
Shutdown Delay Time
Enable Delay Time
Power-On Time
Input Capacitance
Total Harmonic Distortion
Total Harmonic Distortion
Settling Time to 0.1%
SYMBOL
en
in
CLOAD
tSHDN
tEN
tON
CIN
THD
tS
f = 10kHz
f = 10kHz
AV = 1V/V
(Note 1)
(Note 1)
CONDITIONS
f = 10kHz, VOUT =
2Vp-p, AV = 1V/V
VOUT = 2V step
RL = 100kΩ
RL = 2kΩ
MIN TYP MAX UNITS
36
nV/√Hz
1
fA/√Hz
400
pF
0.4
µs
6
µs
5
µs
2.5
pF
0.009
%
0.015
7
µs
ELECTRICAL CHARACTERISTICS
(VDD = +5V, VSS = 0, VCM = 0, VOUT = VDD/2, RL = ∞ connected to VDD/2, TA = -40°C to +125°C, unless otherwise noted.) (Note 3)
PARAMETER
Supply Voltage Range
Supply Current per Amplifier
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Offset Current
Input Common-Mode Voltage
Range
Common-Mode Rejection Ratio
Power-Supply Rejection Ratio
SYMBOL
VDD
IDD
VOS
TCVOS
IB
IOS
CONDITIONS
Inferred from PSRR test
(Note 2)
(Note 2)
VCM Inferred from CMRR test
CMRR
PSRR
VSS ≤ VCM ≤ VDD - 1.5V
2.5V ≤ VCC ≤ 5.5V
MIN TYP MAX UNITS
2.5
5.5
V
800
µA
±6.5 mV
±1
µV/°C
±100 pA
±100 pA
VSS
VDD - 1.5
V
65
dB
74
dB
Shutdown Mode Output
Leakage
IOUTSHDN
Device in shutdown
mode, SHDN = VSS,
VSS < VOUT < VDD
(Note 1)
-40°C to +85°C
+85°C to +125°C
±1.0
µA
±5.0
SHDN Logic Low
SHDN Logic High
SHDN Input Current
VIL
VIH
IIL, IIH
(Note 1)
(Note 1)
SHDN = VDD or VSS (Notes 1, 2)
0.7 · VDD
0.3 · VDD V
V
±100 pA
Large-Signal Voltage Gain
AVOL VSS + 0.3V ≤ VOUT ≤ VDD - 0.3V, RL = 2kΩ
85
dB
Output Voltage High
VOH Specified as |VDD - VOH|, RL = 2kΩ
250
mV
Output Voltage Low
VOL Specified as |VSS - VOL|, RL = 2kΩ
100
mV
Note 1: Shutdown mode is only available in the 6-pin SC70 single op amp (MAX4401).
Note 2: Guaranteed by design.
Note 3: Specifications are 100% tested at TA = +25°C (exceptions noted). All temperature limits are guaranteed by design.
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