MAX1066(2002) データシートの表示（PDF） - Maxim Integrated

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MAX1066
(Rev.:2002)

Low-Power, 14-Bit Analog-to-Digital Converters with Parallel Interface

Maxim Integrated 

Low-Power, 14-Bit Analog-to-Digital Converters

with Parallel Interface

AIN

CSWITCH

3pF

TRACK

REF

CAPACITIVE DAC

HOLD

CDAC = 32pF

AGND

HOLD

ZERO

RIN

800Ω

TRACK

AUTO-ZERO

RAIL

Figure 4. Equivalent Input Circuit

Standby Mode

While in standby mode, the supply current is reduced

to less than 1mA (typ). The next falling edge of CS with

R/C low causes the MAX1065/MAX1066 to exit standby

mode and begin acquisition. The reference and refer-

ence buffer remain active to allow quick turn-on time.

Standby mode allows significant power savings while

running at the maximum sample rate.

Shutdown Mode

In shutdown mode, the reference and reference buffer

are shut down between conversions. Shutdown mode

reduces supply current to 0.5µA (typ) immediately after

the conversion. The falling edge of CS with R/C low

causes the reference and buffer to wake up and enter

acquisition mode. To achieve 14-bit accuracy, allow

10ms (CREFADJ = 0.1µF, CREF = 1µF) for the internal

reference to wake up. Increase wakeup time propor-

tionally when using larger values of CREFADJ and CREF.

Internal and External Reference

Internal Reference

The internal reference of the MAX1065/MAX1066 is

internally buffered to provide 4.096V (typ) output at

REF. Bypass REF to AGND and REFADJ to AGND with

1µF and 0.1µF respectively. Fine adjustments can be

made to the internal reference voltage by sinking or

sourcing current at REFADJ. The input impedance at

REFADJ is nominally 5kΩ. The internal reference volt-

age is adjustable to ±1.5% with the circuit of Figure 7.

External Reference

An external reference can be placed at either the input

(REFADJ) or the output (REF) of the MAX1065/

MAX1066’s internal buffer amplifier. When connecting

an external reference to REFADJ, the input impedance

is typically 5kΩ. Using the buffered REFADJ input

makes buffering the external reference unnecessary;

however, the internal buffer output must be bypassed

at REF with a 1µF capacitor.

Connect REFADJ to AVDD to disable the internal buffer.

Directly drive REF using an external reference. During

conversion, the external reference must be able to

drive 100µA of DC load current and have an output

impedance of 10Ω or less. REFADJ’s impedance is typ-

ically 5kΩ. The DC input impedance of REF is 40kΩ

minimum.

For optimal performance, buffer the reference through

an op amp and bypass REF with a 1µF capacitor.

Consider the MAX1065/MAX1066’s equivalent input

noise (80µVRMS) when choosing a reference.

CS

R/C

EOC

REF

AND

BUFFER

ACQUISITION

REF POWER-

DOWN BIT

CONVERSION

DATA

OUT

ACQUISITION

CS

REF POWER-

DOWN BIT

R/C

EOC

REF

AND

BUFFER

CONVERSION

DATA

OUT

Figure 5. Selecting Standby Mode

Figure 6. Selecting Shutdown Mode

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