MAS3549F データシートの表示（PDF） - Micronas
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MAS3549F Datasheet PDF : 92 Pages
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MAS 35x9F
DATA SHEET
3. Controlling
3.1. I2C Interface
Controlling between the MAS 35x9F and the external
controller is done via an I2C slave interface.
3.1.1. Device Address
The device addresses are 3C/3Ehex (device write
“DW”) and 3D/3Fhex (device read, “DR”) as shown in
Table 3–1. The device address pair 3C/3Dhex applies if
the DVS pin is connected to VSS, the device address
pair 3E/3Fhex applies if the DVS pin is connected to
I2CVDD.
Table 3–1: I2C device address
A7 A6 A5 A4 A3 A2 A1 W/R
0 0 1 1 1 1 DVS 0/1
I2C clock synchronization is used to slow down the
interface if required.
3.1.2. I2C Registers and Subaddresses
The interface uses one level of subaddresses. The
MAS 35x9F interface has 7 subaddresses allocated
for the corresponding I2C registers. The registers can
be divided into three categories as shown in Table 3–
2.
The address 6Ahex is used for basic control, i.e. reset
and task select. The other addresses are used for data
transfer from/to the MAS 35x9F.
The I2C registers of the MAS 35x9F are 16 bits wide,
the MSB is denoted as bit[15]. Transmissions via I2C
bus have to take place in 16-bit words (two byte trans-
fers, MSB sent first); thus, for each register access,
two 8-bit data words must be sent/received via I2C
bus.
3.1.3. Naming Convention
The description of the various controller commands
uses the following formalism:
– Abbreviations used in the following descriptions:
a address
d data value
n count value
o offset value
r register number
x don’t care
– Memory addresses, like D1:89f, are always in hexa-
decimal notation.
– A data value is split into 4-bit nibbles which are
numbered beginning with 0 for the least significant
nibble.
– Data values in nibbles are always shown in hexa-
decimal notation.
– A hexadecimal 20-bit number d is written, e.g. as
d = 17C63hex, its five nibbles are
d0 = 3hex, d1 = 6hex, d2 = Chex, d3 = 7hex, and
d4 = 1hex.
– Variables used in the following descriptions:
I²C address:
DDWR33DC//33FEhheexxII22CCddeevviciceerwearidte
DSP core:
data_write68hexDSP data write
data_read69hexDSP data read
Codec:
codec_write6Chexcodec write
codec_read6Dhexcodec read
– Bus signals
S Start
P Stop
A ACK = Acknowledge
N NAK = Not acknowledge
W Wait = I2C clock line is held low
while the MAS 35x9F is processing
the current I2C command
– Symbols in the telegram examples
< Start Condition
> Stop
dd data bytes
xx ignore
All telegram numbers are hexadecimal, data origi-
nating from the MAS 35x9F are represented as gray
letters.
Example:
<DW 68 dd dd >
write data to DSP
<DW 69 <DR dd dd > read data from DSP
Fig. 3–1 shows I2C bus protocols for write and read
operations of the interface; the read operations require
an extra start condition and repetition of the chip
address with the device read command (DR). Fields
with signals/data originating from the MAS 35x9F are
marked by a gray background.
Note: In some cases the data reading process must
be concluded by a NAK condition.
3.2. Direct Configuration Registers
The task selection of the DSP and the DC/DC convert-
ers are controlled in the direct configuration registers
CONTROL, DCCF, and DCFR.
22
June 30, 2004; 6251-505-1DS
Micronas
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