WM8501
Pre-Production
1/fs
LRCLK
Max 4 BCLK's
BCLK
DIN
LEFT CHANNEL
RIGHT CHANNEL
12
MSB
15 16 1 2
LSB
Input Word Length (16 bits)
15 16
NO VALID DATA
1
Figure 6 DSP Mode B Timing
AUDIO DATA SAMPLING RATES
The master clock for WM8501 supports audio sampling rates from 128fs to 768fs, where fs is the
audio sampling frequency (LRCLK) typically 32kHz, 44.1kHz, 48kHz, 96kHz or 192kHz. The
master clock is used to operate the digital filters and the noise shaping circuits.
The WM8501 has a master clock detection circuit that automatically determines the relation
between the master clock frequency and the sampling rate (to within +/- 8 master clocks). If there
is a greater than 8 clocks error, the interface shuts down the DAC and mutes the output. The
master clock should be synchronised with LRCLK, although the WM8501 is tolerant of phase
differences or jitter on this clock.
SAMPLING
RATE
(LRCLK)
128fs
MASTER CLOCK FREQUENCY (MHz) (MCLK)
192fs
256fs
384fs
512fs
32kHz
4.096
6.144
8.192
12.288
16.384
44.1kHz
5.6448
8.467
11.2896
16.9344
22.5792
48kHz
6.144
9.216
12.288
18.432
24.576
96kHz
12.288
18.432
24.576
36.864 Unavailable
192kHz
24.576
36.864 Unavailable Unavailable Unavailable
Table 1 Master Clock Frequencies Versus Sampling Rate
768fs
24.576
33.8688
36.864
Unavailable
Unavailable
w
PP Rev 3.1 May 2006
12