FT232BM(2004) データシートの表示（PDF） - Future Technology
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FT232BM Datasheet PDF : 54 Pages
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FT2232C Dual USB UART / FIFO I.C.
2.0 Features and Enhancements
The FT2232C incorporates all of the enhancements introduced for the second generation FT232BM and FT245BM
chips. These are summarised as follows :-
• Two Individually Configurable IO Channels
is also retained. This will make the device gently
Each of the FT2232C’s Channels (A and B) can be
pull down on the FIFO / UART IO lines when the
individually configured as a FT232BM-style UART
interface, or as a FT245BM-style FIFO interface. In
addition these channel can be configured in a number
of special IO modes.
power is shut off (PWREN# is high). In this mode any
residual voltage on external circuitry is bled to GND
when power is removed, thus ensuring that external
circuitry controlled by PWREN# resets reliably when
• Integrated Power-On-Reset (POR) circuit
power is restored.
The device incorporates an internal POR function.
• Support for Isochronous USB Transfers
A RESET# pin is available to allow external logic to
Whilst USB Bulk transfer is usually the best choice
reset the device where required, however for most
for data transfer, the scheduling time of the data is
applications this pin can simply be hardwired to Vcc.
not guaranteed. For applications where scheduling
A RSTOUT# pin is provided in order to allow the new
latency takes priority over data integrity such as
POR circuit to provide a stable reset to external MCU
transferring audio and low bandwidth video data,
and other devices.
the FT2232C offers the option of USB Isochronous
• Integrated RCCLK circuit
transfer via configuration of bit in the EEPROM.
Used to ensure that the oscillator and clock multiplier
PLL frequency are stable prior to USB enumeration.
• Send Immediate / Wake Up Signal Pin on each
channel
• Integrated level converter on UART / FIFO
interface and control signals
Each channel of the FT2232C has its own
independent VCCIO pin that can be supplied by
between 3V to 5V. This allows each channel’s output
voltage drive level to be individually configured. Thus
allowing, for example 3.3V logic to be interfaced
to the device without the need for external level
converter I.C.’s.
There is a Send Immediate / Wake Up (SI/WU) signal
pins on each of the chips channels. These combine
two functions on one pin. If USB is in suspend mode
(and remote wakeup is enabled in the EEPROM),
strobing this pin low will cause the device to request
a resume from suspend (WakeUp) on the USB Bus.
Normally, this can be used to wake up the Host PC.
During normal operation, if this pin is strobed low
any data in the device RX buffer will be sent out over
USB on the next Bulk-IN request from the drivers
• Improved power management control for high-
power USB Bus Powered devices
regardless of the packet size. This can be used to
optimise USB transfer speed for some applications.
The PWREN# pin will become active when the
device is enumerated by USB, and be deactivated
when the device is in USB suspend. This can be
used to directly drive a transistor or P-Channel
MOSFET in applications where power switching
of external circuitry is required. The BM pull down
enable feature (configured in the external EEPROM)
• Low suspend current
The suspend current of the FT2232C is typically
under 100 μA (excluding the 1.5K pull up resistor on
USBDP) in USB suspend mode. This allows greater
margin for peripherals to meet the USB Suspend
current limit of 500uA.
DS2232C Version 1.2
© Future Technology Devices International Ltd. 2004
Page 3 of 54
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