SJA1000 データシートの表示（PDF） - Philips Electronics

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SJA1000

Stand-alone CAN controller

Philips Electronics 

Philips Semiconductors

Stand-alone CAN controller

Product specification

SJA1000

6.3.5 STATUS REGISTER (SR)

The content of the status register reflects the status of the SJA1000. The status register appears to the microcontroller

as a read only memory.

Table 5 Bit interpretation of the status register (SR); CAN address 2

BIT

SR.7

SR.6

SR.5

SR.4

SR.3

SR.2

SR.1

SR.0

SYMBOL

NAME

BS

Bus Status; note 1

VALUE

1

0

ES

Error Status; note 2

1

TS

RS

TCS

0

Transmit Status; note 3 1

0

Receive Status; note 3 1

0

Transmission Complete 1

Status; note 4

0

TBS

Transmit Buffer Status; 1

note 5

0

DOS

RBS

Data Overrun Status; 1

note 6

0

Receive Buffer Status; 1

note 7

0

FUNCTION

bus-off; the SJA1000 is not involved in bus

activities

bus-on; the SJA1000 is involved in bus activities

error; at least one of the error counters has

reached or exceeded the CPU warning limit

ok; both error counters are below the warning limit

transmit; the SJA1000 is transmitting a message

idle; no transmit message is in progress

receive; the SJA1000 is receiving a message

idle; no receive message is in progress

complete; the last requested transmission has

been successfully completed

incomplete; the previously requested transmission

is not yet completed

released; the CPU may write a message into the

transmit buffer

locked; the CPU cannot access the transmit

buffer; a message is waiting for transmission or is

already in process

overrun; a message was lost because there was

not enough space for that message in the RXFIFO

absent; no data overrun has occurred since the

last clear data overrun command was given

full; one or more messages are available in the

RXFIFO

empty; no message is available

2000 Jan 04

15

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