GS840F36AT-8 データシートの表示（PDF） - Giga Semiconductor
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GS840F36AT-8 Datasheet PDF : 21 Pages
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GS840F18/32/36AT-7.5/8/8.5/10/12
Operating Currents
Parameter Test Conditions
Operating All other inputs
Current
≥VIH or ≤ VIL
Output open
Standby ZZ ≥ VDD – 0.2
Current
V
Deselect Device Deselected;
Current
All other inputs
≥ VIH or ≤ VIL
Symbol
IDD
Flow Through
ISB
Flow Through
IDD
Flow Through
-7.5
-8
-8.5
-10
-12
0 -40 0 -40 0 -40 0 -40 0 -40 Unit
to to to to to to to to to to
70°C 85°C 70°C 85°C 70°C 85°C 70°C 85°C 70°C 85°C
245 255 210 220 190 200 165 175 135 145 mA
20 30 20 30 20 30 20 30 20 30 mA
45 55 40 50 40 50 35 45 35 45 mA
AC Electrical Characteristics
Parameter
-7.5
-8
-8.5
-10
-12
Symbol
Unit
Min Max Min Max Min Max Min Max Min Max
Clock Cycle Time
tKC 8.5 — 9.0 — 10.0 — 10.0 — 15.0 — ns
Flow
Clock to Output Valid
tKQ
— 7.5 — 8.0 — 8.5 — 10 — 12 ns
Through Clock to Output Invalid tKQX 3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns
Clock to Output in Low-Z
tLZ1
3.0 — 3.0 — 3.0 — 3.0 — 3.0 — ns
Clock HIGH Time
tKH 1.3 — 1.3 — 1.3 — 1.3 — 1.3 — ns
Clock LOW Time
tKL
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns
Clock to Output in High-Z tHZ1 1.5 3.0 1.5 3.2 1.5 3.5 1.5 3.8 1.5 5 ns
G to Output Valid
tOE
— 3.0 — 3.2 — 3.5 — 3.8 — 5 ns
G to output in Low-Z
tOLZ1
0
—
0
—
0
—
0
—
0
— ns
G to output in High-Z
tOHZ1 — 3.0 — 3.2 — 3.5 — 3.8 — 5 ns
Setup time
tS
1.5 — 1.5 — 1.5 — 1.5 — 1.5 — ns
Hold time
tH
0.5 — 0.5 — 0.5 — 0.5 — 0.5 — ns
ZZ setup time
tZZS2
5
—
5
—
5
—
5
—
5
— ns
ZZ hold time
tZZH2
1
—
1
—
1
—
1
—
1
— ns
ZZ recovery
tZZR 20 — 20 — 20 — 20 — 20 — ns
Notes:
1. These parameters are sampled and are not 100% tested
2. ZZ is an asynchronous signal. However, In order to be recognized on any given clock cycle, ZZ must meet the specified setup and hold
times as specified above.
Rev: 1.09 10/2004
14/21
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 1999, GSI Technology
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