V54C3128804VALS7 データシートの表示（PDF） - Mosel Vitelic Corporation

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V54C3128804VALS7

128Mbit SDRAM 3.3 VOLT, TSOP II / SOC PACKAGE 8M X 16, 16M X 8, 32M X 4

Mosel Vitelic Corporation  

MOSEL VITELIC

V54C3128(16/80/40)4V(T/S)

Description Pkg. Pin Count

TSOP-II

T

54

V 54 C 3 12880 4 V A L T

Mosel Vitelic

Manufactured

SYNCHRONOUS

DRAM FAMILY

C=CMOS Family

Device

Number

3.3V, LVTTL INTERFACE

16Mx8(4K Refresh)

4 Banks

Special

Feature

Speed

6 ns

7 ns

8 ns

Component

Package

L=Low Power

Component Rev Level

V=LVTTL

54 Pin Plastic TSOP-II

PIN CONFIGURATION

Top View

VCC 1

I/O1 2

VCCQ 3

NC 4

I/O2 5

VSSQ 6

NC 7

I/O3 8

VCCQ 9

NC 10

I/O4 11

VSSQ 12

NC 13

VCC 14

NC 15

WE 16

CAS 17

RAS 18

CS 19

BA0 20

BA1 21

A10 22

A0 23

A1 24

A2 25

A3 26

VCC 27

54 VSS

53 I/O8

52 VSSQ

51 NC

50 I/O7

49 VCCQ

48 NC

47 I/O6

46 VSSQ

45 NC

44 I/O5

43 VCCQ

42 NC

41 VSS

40 NC

39 DQM

38 CLK

37 CKE

36 NC

35 A11

34 A9

33 A8

32 A7

31 A6

30 A5

29 A4

28 VSS

Pin Names

CLK

CKE

CS

RAS

CAS

WE

A0–A11

BA0, BA1

I/O1–I/O8

DQM

VCC

VSS

VCCQ

VSSQ

NC

Clock Input

Clock Enable

Chip Select

Row Address Strobe

Column Address Strobe

Write Enable

Address Inputs

Bank Select

Data Input/Output

Data Mask

Power (+3.3V)

Ground

Power for I/O’s (+3.3V)

Ground for I/O’s

Not connected

V54C3128(16/80/40)4V(T/S) Rev.1.5 March 2003

4

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