Electrical Characteristics Freescale Semiconductor, Inc.
Parameter
Table 6. Loop Specifications (TA = -40 to 85°C)
Test Condition
Guaranteed Range
Symbol
Figure
No.
VDD
V
Unit
Min
Max
Input Frequency, fin
[Note}
Vin ≥ 500 mVpp Sine
f
Wave,
N Counter Set to
Divide Ratio
Such that fV ≤ 2.0 MHz
8
2.7
5.0
80
3.0
5.0
100
4.5
25
185
5.5
45
185
Vin ≥ 1.0 Vpp Sine
f
Input Frequency, OSCin
Externally Driven with
ac-coupled Signal
Wave,
OSCout = No Connect,
R Counter Set to
Divide Ratio Such that
fR ≤ 2 MHz
9
2.7
1.0*
22
3.0
1.0*
25
4.5
1.0*
30
5.5
1.0*
35
Crystal Frequency,
OSCin and OSCout
C1 ≤ 30 pF
C2 ≤ 30 pF
Includes Stray
Capacitance
fXTAL
11
2.7
2.0
12
3.0
2.0
12
4.5
2.0
15
5.5
2.0
15
Output Frequency,
REFout
CL = 30 pF
fout
12, 14 2.7
dc
-
4.5
dc
10
5.5
dc
10
Operating Frequency of
the
Phase Detectors
f
2.7
dc
-
4.5
dc
2.0
5.5
dc
2.0
Output Pulse Width, φR,
φV, and LD
fR in Phase with fV
CL = 50 pF
tw
13, 14 2.7
-
-
4.5
20
100
5.5
16
90
Output Transition Times,
φR, φV, LD, fR, and fV
CL = 50 pF
tTLH,
13, 14 2.7
-
-
tTHL
4.5
-
65
5.5
-
60
Input Capacitance fin
OSCin
Cin
-
-
-
7.0
-
-
-
7.0
* IF lower frequency is desired, use wave shaping or higher amplitude sinusoidal signal in ac-coupled case. Also, see Figure 25 for dc coupling.
MHz
MHz
MHz
MHz
MHz
ns
ns
pF
Sine Wave
Generator
50 Ω*
100 pF
fin
fV
Vin
MC145170-2
VSS VDD
*Characteristic impedance
Test Point
V+
Figure 8. Test Circuit, fin
8
MC145170-2 Technical Data
MOTOROLA
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