MC145170-2 データシートの表示（PDF） - Motorola => Freescale

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MC145170-2

PLL Frequency Synthesizer with Serial Interface

Motorola => Freescale 

Design Considerations Freescale Semiconductor, Inc.

Buffer

VHF Output

VHF VCO

Low-pass Filter

V+

V+

MCU

Optional

1 OSCin

2 OSCout

3 REF

4 fin

5

Din

6

ENB

7 CLK

8 Dout

VDD 16

φV 15

φR 14

PDout 13

VSS 12

LD 11

fV 10

fR 9

Optional

Loop Error Signals

(Note 1)

Threshold

Detector

Integrator

Optional

(Note 5)

(Note 4)

NOTES:

1. The φR and φV outputs are fed to an external combiner/loop filter. See the Phase-Locked Loop — Low-Pass

Filter Design page for additional information. The φR and φV outputs swing rail-to-rail. Therefore, the user

should be careful not to exceed the common mode input range of the op amp used inthe combiner/loop filter.

2. For optimum performance, bypass the VDD pin to VSS (GND) with one or more low-inductance capacitors.

3. The R counter is programmed for a divide value = OSCin/fR. Typically, fR is the tuning resolution required for

the VCO. Also, the VCO frequency divided by fR = N, wher e N is the divide value of the N counter.

4. May be an R-C low-pass filter.

5. May be a bipolar transistor.

Figure 24. Example Application

22

MC145170-2 Technical Data

MOTOROLA

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