ICS525-02(2000) データシートの表示（PDF） - Integrated Circuit Systems

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ICS525-02
(Rev.:2000)

OSCaR™ User Configurable Clock

Integrated Circuit Systems 

ICS525-01/02

OSCaR™ User Configurable Clock

Determining (setting) the output frequency

The user has full control in setting the desired output frequency over the range shown in the table on

page 2. To replace a standard oscillator, a user should connect the divider select input pins directly to

ground (or VDD, although this is not required because of internal pull-ups) during Printed Circuit Board

layout, so that the ICS525 automatically produces the correct clock when all components are soldered. It is

also possible to connect the inputs to parallel I/O ports to switch frequencies. By choosing divides

carefully, the number of inputs which need to be changed can be minimized. Observe the restrictions

stated below on allowed values of VDW and RDW.

ICS525-01 Settings

Use the online ICS525 calculator at www.icst.com/products/ics525inputForm.html or alternatively, the

output of the ICS525-01 can be determined by the following simple equation:

(VDW+8)

CLK frequency = Input frequency • 2 • (RDW+2)(OD)

Where

Reference Divider Word (RDW) = 1 to 127 (0 is not permitted)

VCO Divider Word (VDW) = 4 to 511 (0, 1, 2, 3 are not permitted)

Output Divider (OD) = values on page 3

Also, the following operating ranges should be observed:

[ ] 10

MHz <

Input frequency

•2

•

(VDW+8)

(RDW+2)

< 320 MHz at 5.0V or

< 200 MHz at 3.3V

See Table on Page 3

for full details of

maximum output.

200 kHz

<

Input Frequency

(RDW+2)

ICS525-02 Settings

Use the online ICS525 calculator at www.icst.com/products/ics525inputForm.html or alternatively, the

output of the ICS525-02 can be determined by the following simple equation:

CLK

frequency

=

Input

frequency

•

2

•

(VDW+8)

(RDW+2)(OD)

Where

Reference Divider Word (RDW) = 0 to 127

VCO Divider Word (VDW) = 0 to 511

Output Divider (OD) = values on page 3

[ ] Also, the following operating ranges should be observed:

10

MHz

<

Input

frequency

•

2

•

(VDW+8)

(RDW+2)

< 400 MHz at 5.0V or

< 240 MHz at 3.3V

See Table on Page 3

for full details of

maximum output.

200 kHz

<

Input Frequency

(RDW+2)

MDS 525-01/02 I

4

Revision 071100

Printed 11/13/00

Integrated Circuit Systems, Inc. • 525 Race Street •San Jose• CA • 95126•(408) 295-9800tel• www.icst.com

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