
Vitesse Semiconductor
Dual Channel WAN/LAN/Backplane RXAUI/XAUI to SFP+/KR 10 GbE SerDes PHY with VeriTime™
Vitesse’s dual channel SerDes PHY provides fully IEEE 1588v2-compliant devices and hardware-based KR support for timing-critical applications, including all industry-standard protocol encapsulations.
VeriTime™ is Vitesse’s patent-pending distributed timing technology that delivers the industry’s most accurate IEEE 1588v2 timing implementation. IEEE 1588v2 timing integrated in the PHY is the quickest, lowest cost method of implementing the timing accuracy that is critical to maintaining existing timing-critical capabilities during the migration from TDM to packet-based architectures.
Highlights
• IEEE 1588v2 compliant
• Failover switching and lane ordering
• Simultaneous LAN and WAN support
• RXAUI/XAUI support
• SFP+ I/O with KR support
• 1 GbE support
APPLICATIONs
• Multiple-port RXAUI/XAUI to
SFI/ SFP+ line cards or NICs
• 10GBASE-KR compliant backplane
transceivers
• Carrier Ethernet networks requiring
IEEE 1588v2 timing
• Secure data center to data center
interconnects
• 10 GbE switch cards and router cards