
Numonyx -> Micron
Introduction
This document contains information pertaining to the products in the Numonyx™ Wireless Flash Memory (W18/W30 SCSP) family with asynchronous RAM. The W18/ W30 SCSP 32WQ and 64WQ families offer a wide variety of stacked combinations that include single flash die, two flash die, flash + PSRAM, and flash + SRAM options. This document provides information where this SCSP family differs from the Numonyx Wireless Flash Memory (W18/W30) discrete device.
Product Features
◾ Device Architecture
— Flash Density: 32-Mbit, 64-Mbit
— Async PSRAM Density: 16-Mbit, 32-Mbit
— Top, Bottom or Dual flash parameter
configuration
◾ Device Voltage
— Flash VCC = 1.8 V; Flash VCCQ = 1.8 V or 3.0 V
— RAM VCC = 1.8 V or 3.0 V
◾ Device Packaging
— 88 balls (8 x 10 active ball matrix)
— Area: 8x10 mm
— Height: 1.2 mm to 1.4 mm
◾ PSRAM Performance
— 70 ns initial access, 25 ns async page reads at
1.8 V I/O
— 70 ns initial access async PSRAM at 1.8 V
I/O
— 70 ns initial access, 25 ns async page
reads at 3.0 V I/O
◾ SRAM Performance
— 70 ns initial access at 1.8 V or 3.0 V I/O
◾ Quality and Reliability
— Extended Temperature: –25 °C to +85 °C
— Minimum 100K flash block erase cycle
— 90 nm ETOX™ IX flash technology
— 130 nm ETOX™ VIII flash technology
◾ Flash Performance
— 65 ns initial access at 1.8 V I/O
— 70 ns initial access at 3.0 V I/O
— 25 ns async page at 1.8 V or 3.0 V I/O
— 14 ns sync reads (tCHQV) at 1.8 V I/O
— 20 ns sync reads (tCHQV) at 3.0 V I/O
— Enhanced Factory Programming:
3.10 µs/Word (Typ)
◾ Flash Architecture
— Read-While-Write/Erase
— Asymmetrical blocking structure
— 4-KWord parameter blocks (Top or
Bottom)
— 32-KWord main blocks
— 4-Mbit partition size
— 128-bit One-Time Programmable
(OTP) Protection Register
— Zero-latency block locking
— Absolute write protection with block
lock using F-VPP and F-WP#
◾ Flash Software
— Numonyx™ Flash Data Integrator
(FDI) and Common Flash Interface
(CFI)