GENERAL DESCRIPTION
The Micron® Zero Bus Turnaround™ (ZBT®) SRAM family employs high-speed, low-power CMOS designs using an advanced CMOS process.

FEATURES
• High frequency and 100 percent bus utilization
• Fast cycle times: 6ns, 7.5ns and 10ns
• Single +3.3V ±5% power supply (VDD)
• Separate +3.3V or +2.5V isolated output buffer supply (VDDQ)
• Advanced control logic for minimum control signal interface
• Individual BYTE WRITE controls may be tied LOW
• Single R/W# (read/write) control pin
• CKE# pin to enable clock and suspend operations
• Three chip enables for simple depth expansion
• Clock-controlled and registered addresses, data I/Os and control signals
• Internally self-timed, fully coherent WRITE
• Internally self-timed, registered outputs to eliminate the need to control OE#
• SNOOZE MODE for reduced-power standby
• Common data inputs and data outputs
• Linear or Interleaved Burst Modes
• Burst feature (optional)
• Pin/function compatibility with 2Mb, 4Mb, and 18Mb ZBT SRAM
• Automatic power-down
• 100-pin TQFP package
• 165-pin FBGA package